2N4930U4 Temperature-Power Derating Curve [2N3743U4, 2N4931U4]
PNP Silicon High Voltage Transistor. Package, U4 SMD [Surface Mount].
2N4930U4 Transistor Operational Power Derating Curve
The chart details the maximum allowable power dissipation with increasing ambient temperature. Maximum operational power dissipation is achievable at 25C. However above 25C the maximum package dissipation, or power, must be reduce to insure that the devices junction temperature remains constant. The higher the ambient temperature is increased the lower the allowable power dissipation, as depicted in the curves. Decreasing a devices operational limits as temperature is increased is called derating, in this case derating a devices operational power dissipation vs increasing ambient [surrounding] temperature. The graph above depicts the derating of a 2N4930 transistor in a U4 package.
How to read the curves; Interpreting Deraring Curves.
Use the Graph to determine how much to derate power [wattage] based on ambient operational temperature. Additional Transistor Derating Curves
Temperature derating is a standard design practice for electrical engineers.
Try increasing the PWB pad size to dissipate more heat into to the board and away from the component.
Refer to MIL-PRF-19500/397H; Semiconductor Device, Transistor, PNP, Silicon, Types 2N3743, 2N3743U4, 2N4930, 2N4930U4, 2N4931, and 2N4931U4, JAN, JANTX, JANTXV, JANS, JANHC, and JANKC, [TO-39, U4 surface mount, Semiconductor-Die]
2N4930 Maximum Operational Ratings:
Collector Emitter Voltage = 3000 volts dc
Power Dissipation 250C = 1 Watt
Operating Temperature = -65 to +2000C
Listing of Transistor Manufacturers and vendors.
How to Derate; Guideline for Derating Electronic Components
