Through Hole 2N4930
2N4930 Temperature-Power Derating Curve [2N3743U4, 2N4931U4]
PNP Silicon High Voltage Transistor. Package, TO-39 [Through-Hole].
2N4930 Transistor Operational Power Derating Curve
The chart shows the maximum allowable power dissipation with increasing 2N4930 device case temperature. Maximum operational power dissipation is only achievable at 25C, or below. However above 25C the maximum package dissipation, or power, must be reduce to insure that the 2N4930s junction temperature remains constant over increasing temperatures. The higher the case temperature is increased the lower the allowable power dissipation, as depicted in the curves. Decreasing a devices operational limits as temperature is increased is called derating, in this case derating a 2N4930 operating power dissipation vs increasing ambient [surrounding] temperature. The graph above depicts the derating of a 2N4930 transistor in a case mounted package.
Use the Graph to determine how much to derate power [wattage] based on ambient operational temperature. Additional Transistor Derating Curves. Help in how to read the curves is provided on Interpreting Deraring Curves.
Temperature derating is a standard design practice to insure that the devices junction temperature never exceeds the maximum number provided in the data sheet.
Refer to MIL-PRF-19500/397; Semiconductor Device, Transistor, PNP, Silicon, Types 2N3743, 2N3743U4, 2N4930, 2N4930U4, 2N4931, and 2N4931U4, JAN, JANTX, JANTXV, JANS, JANHC, and JANKC, [TO-39, U4 surface mount, Semiconductor-Die]
2N4930 Maximum Operational Ratings:
Collector Emitter Voltage = 300 volts dc
Collector Base Voltage = 200 volts dc
Emitter Base Voltage = 5 volts dc
Power Dissipation 250C = 1 Watt
Operating Temperature = -65 to +2000C
Note that by 200C the 2N4930 must dissipate zero power.
Surface Mount 2N4930
The 2N4930 Surface Mount Device [SMD] package is shown to the left. The operating characteristics over temperature are better than the TO-39 device. Both the upper most curves start at 10 watts and run out to 50 degrees and 100 degrees before falling in a straight line to 200 degrees centigrade. The two lower lines which represent the preferred operating lines start at 5.5 and 6.5 watts and fall in a straight line down to 110 and 125 degrees C. The surface mount curve also relates to the temperature of the case.
Note that regardless of the transistor, almost all the preferred operating curves terminate at either 110C or 125C insuring that the transistor is operated far below the maximum junction temperature which would damage the semiconductor. One method of trying to dump more heat out of the SMD package is to increase the pad size on the Printed Wiring Board [PWB]. Of course this would also work with the leaded TO-39, but depends more on the lead length. The longer the leads, the less efficient they are at transmitting heat between the actual device and the PWB. The down side to increasing the pad size of the surface mount 2N4930 is that the terminals on the package already take up most of the area under the device. So the any increase in copper pad has to be done out side the foot-print of the package [moving further away from the heat source].
Editor note; there is no rule that says a transistor has to be derated over temperature, but there may be a policy at a particular engineering company.
