2N3762 Transistor Derating Curves

2N3762U4 Temperature-Power Derating Curve [2N3763, 2N3764, 2N3765]
PNP Silicon Switching Transistor. Package, TO-39 Metal Can [TO-5, TO-46, U4].
2N3762U4 Applications; not yet identified.

2N3762U4 Temperature-Power Derating Graph

Use the Graph to determine the amount of power to derate based on operational ambient temperature [case temperature]. The curves cover a Surface Mount Device [SMD] as shown in the attached graphics.
Note that unlike many other derating graphs this curve uses Case Temperature vs Wattage, and not ambient temperature.
Transistor Derating Curves
Temperature derating is a standard design practice for electrical engineers.

Refer to MIL-PRF-19500/396K; Semiconductor Transistor, PNP, Switching, Types 2N3762, 2N3762L, 2N3762U4, 2N3762UA, 2N3763, 2N3763L, 2N3763U4, 2N3763UA, 2N3764, and 2N3765, JAN, JANTX, JANTXV, JANS, JANSM, JANSD, JANSP, JANSL, JANSR, JANSF, JANSG, JANSH JANHCA, JANKCA, JANKCAM, JANKCAD, JANKCAP, JANKCAL, JANKCAR, JANKCAF, JANKCAG, and JANKCAH, [TO-5, TO-39, TO-46, U4/UA surface mount]
Qualified per MIL-PRF-19500/396

2N3762U4 Maximum Ratings:
Collector Emitter Voltage [Vceo] = 40 volts dc
Collector Base Voltage [Vceo] = 40 volts dc
Emitter Base Voltage [Vebo] = 5 volts dc
Collector Current [Ic] = 1.5 amps dc
Power Dissipation 25⁰C = 10 Watt [maximum]
Operating Temperature = -65 to +200⁰C

Transistor Manufacturers, and Guideline to Derating Electronic Components

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UA Case Package Schematic and pinout

Graph Notes:
1. Maximum theoretical derate design curve. This is the true inverse of the worst case thermal resistance value. All devices are capable of operating at < TJ specified on this curve. Any parallel line to this curve will intersect the appropriate power for the desired maximum TJ allowed.
2. Derate design curve constrained by the maximum junction temperature (TJ < 200^oC) and power rating specified.
3. Derate design curve chosen at TJ < 150^oC, where the maximum temperature of electrical test is performed.
4. Derate design curve chosen at TJ < 125^oC, and 110⁰C to show power rating where most users want to limit TJ in their application.