Serial Debug Interface



SDI bus Description

A cabled interface between a PC and development board.

The Serial Debug Interface [SDI] is a Motorola interface [freescale semiconductor] that a debugger [PC] uses to communicate with an external system. The SDI data format is 8 data bits, 1 stop bit, no parity, and a variable baud rate. The default speed for SDI is 9600 baud. Communication speeds of 1200 through 57600 baud are available, depending on the host-computer hardware. Refer to the RS-232 Description.

The SDI uses a 25-pin D-Sub connector as an interface to a PC's serial port and either a 8 or 10-pin Background Debug Mode [BDM] connector to interface to the hardware [board].

BDM Interface
Serial Debug Interface Header

The SDI Interface was developed in 1996, and is still in wide spread use.
The PC side of the cable uses a 25-pin D connector, while the PCB side uses both a 10 and 6-pin female header [connector header vendors].

SDI Interface
Serial Debug Interface Cable




Serial Debug Interface Signal Assignments

Pin 1 DS, DATA STROBE: Active-low output signal. During a read cycle, indicates that an external device should place valid data on the data bus.
During a write cycle, indicates that valid data is on the data bus.
Pin 2 BERR, BUS ERROR: Active-low input signal of an invalid bus operation attempt.
Pin 3, 5 GND, GROUND
Pin 4 BKPT / DSCLK BREAKPOINT: Active-low input signal that signals a hardware breakpoint to the CPU.
Development Serial Clock: Clock input signal for the background debug mode.
Pin 6 FREEZE: Active high signal that the CPU has acknowledged a breakpoint.
Pin 7 RESET: Active-low, bi-directional signal to start a system reset.
Pin 8 DSI DEVELOPMENT SERIAL IN: Serial data input signal for background debug mode.
Signal is also: INSTRUCTION PIPE 1 for CPU16-based MCUs. INSTRUCTION FETCH for CPU32-based MCUs.
Pin 9 VDD (or Vbias) VOLTAGE DRAIN, DRAIN: Interface operating power (not used for low-voltage or separate-power hookups).
Pin 10 DSO DEVELOPMENT SERIAL OUT: Serial data output signal for background debug mode.
Signal is also: INSTRUCTION PIPE 0 for CPU16-based MCUs. INSTRUCTION PIPE for CPU32-based MCUs

More Integrated Circuit Buses descriptions.
Which has bus descriptions for a number of IC buses.

Short description of Design for Testability.
Also refer to JTAG Signaling description and pin outs.


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Modified 6/27/15
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