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Bused Resistor Networks

Common Node Resistors [Resistor Network]

Common Connection Resistor Networks or bused resistors are used when many of the same value resistor connect to the same point, normally a voltage node [Vcc or Ground]. The resistors within the package will normally always be the same value. Regardless of the package style [shown below] pin 1 is used as the common tie point

Bused R-Array SIP IC package
Common Connection Resistor Network

Graphic shows a 6-pin SIP, 8-pin SIP, and a 10-pin SIP with bused resistors.
The 10-pin package could be used with 8-bit wide buses while the 8-pin and 6-pin devices could be used in smaller systems or random circuits that require a termination resistor.





There are many possible common values for this style of resistor package. Use the table of values below to select a resistor.
This package orientation could be used to pull-up Unused Inputs on ICs. Or to bring Tri-state outputs to a valid logic level.

Possible Resistor Values
22 27 33 39 47 56 68 82 100 120 150 180
220 270 330 390 470 560 680 820 1K 1.2K 1.5K 1.8K
2K 2.2K 2.7K 3.3K 3.9K 4.7K 5.6K 6.8K 8.2K 10K 12K 15K
18K 20K 22K 27K 33K 39K 47K 56K 68K 82K 100K 120K
150K 180K 220K 270K 330K 390K 470K 560K 680K 820K 1M --

Molded Resistor SIP package
8-Pin SIP Package

Resistance Tolerance;
+/- 0.1, +/- 0.5, +/- 1.0, +/- 2.0, +/- 5.0 percent
Voltage Rating;
The maximum continuous working voltage for each resistor shall not exceed 50 volts dc or ac rms.

Related Components;
SIP Style; [Through-Hole]
Isolated Resistor Network Schematic, SIP, Single In-Line Package.
Dual Termination Resistor Network Schematic, SIP Single InLine Pack
Nonstandard Resistor Network Schematic, 6-pin SIP

DIP Style; [Through-Hole]
Resistor Network Schematic, DIP, Dual In-Line Package.
RC Networks, DIP, Dual In-Line Package.

LLCC Style; [Surface Mount]
20-pin LLCC Network Schematics, Leadless Chip Carrier.
16-pin LLCC Network Schematics, Leadless Chip Carrier.
6-pin DLCC Network Schematic, Dual Leadless Chip Carrier.
36-pin BGA Array Schematic, Ball Grid Array.

 
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