Dictionary of Engineering Terms
"A" "B" "C", "D", "E", "F", "G", "H", "I", "J", "K", "L", "M",
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Resistor Network DIP Package

Individual Resistors [Resistor Array]
Although a 20-pin DIP is shown below, other component packages are possible, refer to the links below. This package style [interconnect style] is used when there is no common connection point for the individual resistors. Note that this package contains both individual resistors, and resistor networks [resistor Divider Networks].

R-Network package schematic
20-pin Resistor Network

Individual Resistors, common connection
The resistor network shown above shows a 20-pin DIP arrangement. The eight individual resistors each have a node that only connectors to one pin of the device, while the other resistors connect to the ones in the resistor network in the package.

Common Connection Networks are used when many of the same value resistor connect to the same point, normally a voltage node [Vcc or Ground]. These resistors within the package will normally always be the same value.




20-pin R-Network DIP dimensions
20-pin Resistor Arrays

Refer to the table below to see standard resistor values. There my be other possible common values not shown. Also refer to the definition of Termination Resistor, which is part of the section of Resistor Terms. The networks shown above are produced in DIP Network Package Styles.

Resistor values:
10k; R1, R3, R5, R8, R10, R11.
149.4k; R2, R4
27.475k; R6
12.41k; R7, R9
18.005k; R12

There are many possible common values for this style of resistor package. Use the table of values above to select a resistor.
This package orientation could be used to pull-up Unused Inputs on ICs. Or to bring Tri-state outputs to a valid logic level.

Related Resistor Components;
14-pin DIP, Dual In-Line Package.
16-pin DIP Network Schematic, Dual In-Line Package.
20-pin DIP Network Schematic [above]

20-pin LLCC Network Schematics, Leadless Chip Carrier.
16-pin LLCC Network Schematic, Leadless Chip Carrier.
6-pin DLCC Network Schematic, Dual Leadless Chip Carrier.
36-pin BGA Array Schematic, Ball Grid Array.

Bused Resistor Network Schematic, SIP, Single In-Line Package.
Isolated Resistor Network Schematic, SIP, Single In-Line Package
Dual Termination Resistor Network Schematic, SIP Single InLine Pack
Nonstandard Resistor Network Schematic, 6-pin SIP

Dual Passive; RC Network Schematics.

 
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