McBSP Description

Multichannel Buffered Serial Port [McBSP].
The multichannel buffered serial port (McBSP) in the digital signal processors (DSPs) of the TMS320C6000 DSP family.
The McBSP provides these functions:
Full-duplex communication
Double-buffered data registers, which allow a continuous data stream
Independent framing and clocking for receive and transmit
Direct interface to industry-standard codecs, analog interface chips (AICs), and other serially
connected analog-to-digital (A/D) and digital-to-analog (D/A) devices
External shift clock or an internal, programmable frequency shift clock for data transfer

Direct interface to:
- T1/E1 framers
- MVIP switching compatible and ST-BUS compliant devices
- IOM-2 compliant devices
- AC97 compliant devices (The necessary multi phase frame synchronization capability is provided.)
- IIS compliant devices
- SPI devices

A wide selection of data sizes, including 8, 12, 16, 20, 24, and 32 bits, 8-bit data transfers with the option of LSB or MSB first.

The McBSP consists of a data path and a control path that connect to external devices.
Separate pins for transmission and reception communicate data to these external devices. Four other pins communicate control information (clocking and frame synchronization).
The device communicates to the McBSP using 32-bit-wide control and data registers accessible via the internal peripheral bus.

Data is communicated to devices interfacing to the McBSP via the data transmit (DX) pin for transmission and via the data receive (DR) pin for reception.
Control information (clocking and frame synchronization) is communicated via CLKS, CLKX, CLKR, FSX, and FSR.

Refer to: TMS320C6000 DSP Multichannel Buffered Serial Port (McBSP) []

Also see TTL glue logic IC Manufacturers, or IC Manufacturers covering all types.

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Modified 2/11/12
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