Hard-Drive buses OBSOLETE, {Before ATA and SCSI interfaces with hard drives include: XTA, ST506, and ESDI. XTA, XT Attachment. A rarely used implementation of the ATA Interface using an integrated 8 bit XT controller. ESDI [Enhanced Small Device Interface], was a successor to ST506/412 with faster transfer rates and supporting larger drive sizes. The ESDI bus used the same two-cable connection as ST506.}

H-Bus ("H-Bus is a dedicated input bus designed for transmitting digital media streams from multiple sources to one acquiring host device". The H-Bus was developed by MIT, and operates at 640 Mbps. The H-Bus may have been developed to compete against IEEE-1394 [Firewire], IEEE-1596 [SCI], and Ultra-SCSI.)

HDLC Frame (OSI Layer 2 High-level Data Link Control Protocol Frame description)

HDMI (High Definition Multimedia Interface interface supplies high-definition video and digital audio for consumer Audio Visual entertainment equipment )

HIC (IEEE-1355) (Is a bidirectional serial interconnect which builds a scalable parallel system using a pair(s) of unidirectional lines. HIC runs on 1 to 10 Meters cable distance at 38MBps over copper, and with fiber up to 100 to 3000 Meters cable distance at 169MBps, distance depends on fiber type)

HIPPI 'High-Performance Parallel Interface' (Parallel HIPPI operates with a throughput of 200 MBps [HIPPI-1600], up to 25 meters, using copper cabling. Serial HIPPI will run at 200 MBps [HIPPI-1600 Serial] using coaxial cable for distances up to 25 meter, and fiber optic cabling for distances up to 1K meter (Multi Mode) or 10K meters (Single Mode) HIPPI-6400 will run at 1.6Gbps.)

HMVIP Bus {High-Speed Multi Vendor Interface Protocol Bus. May also be H-MVIP}

HPIB Bus {IEEE-488 Parallel Equipment Bus, also called GPIB.}

HSIC Bus {High-Speed Inter-Chip; a chip-to-chip implementation of USB using LVCMOS with a 10cm bus length.}

HSSI Bus {High Speed Serial Interface used for leased lines [like DS3] and Wide Area Networks [WAN]. High Speed Serial Interface Bus specification has a Maximum rate of 52Mbps [bits per second] using differential ECL [Emitter Coupled Logic] over shielded twisted pair [STP] cable (similar to SCSI II) with a maximum distance of 50 feet.}

HSSTP Bus {High Speed Serial Trace Port Specification}

HubLink Bus (Intel Corp. uses the [proprietary] HubLink [HL] architecture in its Intel 8xx chipsets, as a chip-to-chip interface. HubLink 1.0 was an 8 bit wide bus running at 66MHz. HL 1.5 is 8-bits wide and quad pumped at 133 MHz with a bandwidth of 532 Mbps, and is used to connect the MCH to the ICH. HL 2.0 is 16-bits wide and quad pumped at 133 MHz for a theoretical bandwidth of 1.064 Gbps. The faster HL 2.0 interface connects the MCH [Memory Controller Hub] to the PCI-X and IBA bridges. HubLink is now known as the Hub Interface.)

HyperTransport Bus (A Point-to-Point bus with [at least] two unidirectional links; Uses 2, 4, 8, 16 or 32 bits [in each direction] with a data rate of 800Mbs/per pair with a 400MHz clock. Formally known as Lightning Data Transport (LDT). Used in mobile personal computers, servers, network equipment, embedded applications, and communications equipment)

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An alphabetic listing of released interface buses. Primarily the links point to pages that describe the physical and electrical interfaces. Interface Bus protocols are not addressed.