Electronic Engineering Glossary Terms

IC Parity Checker Chips

Parity Checker Chip

IC Parity Checker Chip. The circuit shown is a 9-bit odd/even parity generator/checker. Even parity is indicated when there are a even number of high bits on the input. Odd parity is indicated when there are a odd number of high bits on the input.
Also refer to the Definition of Parity, or look up check-sum or CRC using the dictionary links at the top of the page. A Parity check is the simplest and least accurate method of checking for errors in a data word.

As with many of the pages in this section, only 74xx commercial parts are listed below, but 54xx military parts are also available; the Part Number Prefix page shows the difference between the commercial temperature ranges and Industrial temperature ranges.

Parity Checker by Function:
74280; 9-Bit Odd/Even Parity Generator/Checker
74480; Dual 8-Bit Parity Generator/Checker
74180; 9-Bit Odd/Even Parity Generators/Checkers
The generic TTL part numbers are used to indicate the chip function. But any of the sub-families would have implemented this same function, as 74S280, 74AS280, 74HC280 and so on.

Many individual ICs perform parity generation or parity checking as part of their normal transmission function, in addition to indicating when a parity error occurs. However only the parts that have their primary function as parity checking is listed above. Any other IC whose primary function is something other than a parity check is not listed. The basic parity checking function is also easily added to an FPGA instead of placing a stand along chip on the board. When the same data bits are already used within the FPGA, no addition I/O lines are required and almost no cells within the FPGA are required.

Engineering Note: Parity systems generate and check for the correct parity in a data word. If the system is set for Even parity than the parity generator looks at the data word and appends either a 1 or a 0 so that there are an even number of ones in the data word [before being transmitted]. The parity checker, upon receiving the word, checks to insure that there are still an even number of one in the word. If the parity is Even, than no error occurred and the data is passed along. However if an error is detected than the system needs to either correct the error or ask for the data to be re-transmitted.

However because the checking system is really only counting the number of 1's [or 0's] than a number of errors could occur within the data word that are never discovered. So, for example; if noise causes one bit to be changed from a one to a zero, the error is detected [an odd number of high bits]. But if, for what ever reason two bits are toggled, than no error is detected because the word still has even parity; although two bits are wrong. So the point is parity checking only goes so far and will not detect all possible error in a data word.