PGA IC Package Drawing

PGA Package, Through-Hole pin array [used with ZIF sockets]

PGA Mechanical View
PGA Package Diagram and PGA Pin Out

Pin Grid Array [PGA] is a Through-Hole style IC, made up of an array of pins. PGA packages are fairly common, although they compete with BGA packages.
Most uPs found in PCs are in the PGA format for easy up-grade, using a socket.
CPGA is another style; Ceramic PGA.
Example of an AMD processor using PGA packages.

Additional IC Package Types.

Intel Processor
Celeron PGA Processor

There is a standard method of labeling the pins on a PGA or BGA package. The top diagram shows the common method for pin counting with letters indicating the rows and numbers indicating the columns. After 21 rows the letters change to 'AA', 'AB' and so on, while the columns continues to count as normal. The pins may be staggered as shown in the Celeron PGA picture, or reside in straight lines as shown in the PGA graphic.

According to the military; the PGA alpha numeric grid system for designating terminal positions shall be as follows: a. A row-column grid system shall be used to designate the terminal positions. b. With the package viewed looking toward the seating plane and the reference or index corner in the lower left, the rows of the array shall be designated by the letters of the alphabet excluding I, O, Q, S, X, and Z from bottom to top. For packages having more than 20 rows, the 21st row shall be designated AA, the 22nd, AB, etc. The columns of the array shall be numbered from left to right. c. Since this system designates terminal positions, rows or columns without terminals shall be designated the same as if terminals were present. So the trick is to remember that letters may be missing from the pin designation, and not to end up on the wrong pin after miss counting.

These graphics are representative of a PGA package. The term PGA does not define the physical size of the IC or the number of pins, only that the pins are laid out in an array. However PGA packages normally have a large number of pins. In general some early PGA packages did not have the number of pins that components do now, but that would be true for almost any package style.

In some cases the pin array of a PGA package occupies the entire surface of the package, in other cases the center of the package is devoid of pins. The absence of pins on the Printed Wiring Board [PWB] may be used to pin escape the PGA package pins or to mount components underneath the device, on the other side of the board. By-pass capacitors are just one type of component that might benefit being placed beneath the package, allowing the capacitors to reside near the pins they by-pass.

68000 uP PGA Package Pin Layout view
68000 uP PGA Package Layout

Editor note; the 68000 microprocessor was first released by Motorola in 1979, and was replaced by the 68008 in 1982. The graphic is used to show all three views of a PGA package and the different placement the pins take within the pin grid array [otherwise the device itself is obsolete].

ASIC IC in a PGA package
ASIC using a PGA package

PGA Pin Field
PGA Pin Field
Pin fields could be any style.

AMD Athlon FX dual core processor using the AM2 pin configuration
AMD Athlon uP, PGA package
PC motherboard

Distributor rolodex Electronic Components Electronic Equipment EDA CDROM Software Engineering Standards, BOB card Cabled Computer Bus Electronic Engineering Design Table Conversion DB9-to-DB25.
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Modified 6/13/15
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