Serial Wire Debug Bus

Serial Wire Debug bus Description

SWD bus: [Serial Wire Debug], defines a point-to-point two wire serial bus developed by ARM in 2004.
In some cases the Serial Wire Debug uses the acronym [SW-DB] when referring to the Serial Wire Debug interface.
SWD is designed to replace the normal 5-pin JTAG port with a clock and single bi-directional data pin, providing all the normal JTAG debug and test functionality. SWD avoids the need to use scan chains for debug.

SWD uses an ARM standard bi-directional wire protocol, defined in the ARM Debug Interface, to pass data to and from the debugger and the target system. The SWD bus is a standard interface for ARM-based devices.

The new multi-drop SWD released in 2009 is fully backwards compatible with the previous version, retaining existing single point-to-point host equipment connections, and enables a device to power down completely while that device is not selected, reducing power consumption. The ARM multi-drop SWD has been designed to be fully interoperable with the recently announced IEEE 1149.7 standard.

Seems like the names Serial Wire Debug and Single Wire Debug are interchangeable.

Related posting; Design-For-Testability.

ARM or Advanced RISC Machine is a RISC processor currently used by a number of different companies.

Engineering Design tags: SWD Specification, IC Interface standard Data Bus, Physical or electrical Interface, and circuit Topology.

Navigation > Engineering Home > Electrical Interface Buses > IC-to-IC Buses > Serial Wire Debug.

Larry's Web Page

Electronic Parts and Equipment Distributors Electronic Component Manufacturers OEM Electronic Equipment Manufacturers EDA Software Producers CAD/CAE Software Engineering Standards, EE Publications Interface/Embedded Computer Bus Electronic Engineering Design Data Engineering Reference Information.
DistributorsComponents Equipment Software Standards Buses Design Reference

Modified 6/13/15
Copyright © 1998 - 2016 All rights reserved Larry Davis