SPI Bus


SPI Bus Description

The Serial Peripheral Interface or SPI-bus is a 4-wire serial communications interface used by many microprocessor peripheral chips operating at full-duplex. The Serial Peripheral Interface (SPI) circuit is a synchronous serial data link [1 megabaud] setup as a Master / Slave interface, operating as a full-duplexed protocol.

The SPI bus can support up to 10Mbps. The SPI bus specifies two control lines Chip Select [CS] and Serial ClocK [SCLK] and two data lines Serial Data In [SDI] and Serial Data Out [SDO]. There may be other naming conventions such as MOSI [Master-Out-Slave-In], MISO [Master-In-Slave-Out], or SS [Slave-Select] that are used by Motorola. Devices may not have or use all four of the I/O pins. SDI [MOSI] may not be present if a device does not require an input [ADC for example], or SDO [MISO] may not be present if a device does not require an output [LCD controllers]. One SPI device acts as the SPI Master by controlling the data flow [generating [SCLK] and asserting device select [CS], then receives and or transmits data via the two data lines.

If the devices on the SPI bus have a chip-select signal it is possible to connect many ICs to the same SPI bus in parallel. If there is a chip-select (CS) signal in use, it can be driven by a spare microcontroller general-purpose output. Every IC connected to the bus needs it's own chip-select signal line. The SCI bus which is used for Asynchronous Serial Communication may be seen next to the SPI bus on a microprocessor.





Additional related data;
See Sensor Buses for more information and additional sensor bus interfaces.

Interface Navigation > Engineering Home > Interface Buses > IC-to-IC Buses > SPI Bus.


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Modified 1/25/12
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