Power HSSTP Description

High Speed Serial Trace Specification [HSST] or Power HSSTP uses the connector defined in the HSSTP specification, the Aurora protocol developed by Xilinx and the electrical interface defined by XAUI [IEEE 802ae].

Four dual-row connector sizes are allowed; 22-pins, 34-pins, 46-pins and 70-pins. The smallest connector, 11x2, provides four differential transmit pairs [or 2 RX pairs and 2 TX pairs], a Vsense line, five JTAG pins, four Vendor I/O pins and a Reset line. Larger connectors add more Transmit and or Receive pairs, although some are reserved.
The pinout variations are provided below, shown by number of pins.
Some connectors provide an optional differential clock signal.

High Speed Serial Trace Port Specification [HSSTP].
HSSTP uses 1 to 6 LVDS lanes, using the Xilinx Aurora protocol

Connector Pinout Variants

As the connector grows in size more signal pairs are added.
Simplex 11 x 2 HSSTP, 4 differential TX lines.
Simplex 17 x 2 HSSTP, 6 differential TX lines.
Simplex 23 x 2 HSSTP, 8 differential TX lines.
Duplex 11 x 2 HSSTP, 2 differential TX lines, 2 differential RX lines.
Duplex 17 x 2 HSSTP, 4 differential TX lines, 2 differential RX lines.
Duplex 23 x 2 HSSTP, 4 differential TX lines, 4 differential RX lines.
Duplex 35 x 2 HSSTP, 8 differential TX lines, 4 differential RX lines.

Power HSSTP Specification

Standard for Physical Connection for High-Speed Serial Trace, Revision 1.0, 2008
Note the different connector sizes based on the number of I/O pairs.
Refer to power.org [www.power.org]

High Speed Serial Trace Port Specification, Revision xx, xx [HSSTP]
Refer to ARM [www.arm.com]

Power HSSTP Connector Manufacturers

Uses the same connectors as HSSTP.
Samtec {20-pin ARM/HSSTP edge mount connector}