PCI Express Bus

[Peripheral Component Interface] Express Bus



[PCI Express Bus Description]
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PCI Express Bus Description

A description of the new Serial PCI Bus "PCI Express".
The PCI Express [PCIe] bus defines the Electrical, topology and protocol for the physical layer of a point to point serial interface over copper wire or optical fiber. In addition to the Physical Layer, the PCI Express specification also covers the Transaction Layer and Data Link Layer. The Physical Layer resides with Layer 1, and the Data Link Layer resides with Layer 2 of the OSI protocol model.

PCI Express is the new serial bus addition to the PCI series of specifications. How ever the electrical and mechanical interface for PCI Express is not compatible with the PCI bus interface. This is a serial bus which uses two low-voltage differential LVDS pairs, at 2.5Gb/s in each direction [one transmit, and one receive pair]. A PCI Express link is comprised of these two unidirectional differential pairs each operating at 2.5Gbps to achieve a basic over all throughput of 5Gbps [before accounting for over-head]. PCI Express uses 8B/10B encoding [each 8 bit byte is translated into a 10 bit character in order to equalize the numbers of 1's and 0's sent, and the encoded signal contains an embedded clock]. PCI Express supports 1x [2.5Gbps], 2x, 4x, 8x, 12x, 16x, and 32x bus widths [transmit / receive pairs]; 2.5Gigabits/second per Lane per Direction. The 8B/10B changes the data transfer numbers to 250MBps per lane, raw data [B= Bytes, b=Bits]. The reduction in throughput is accounted for under the protocol section.

Revision 2.0 increases the speed to 5GT/s [4 GB/s]. LVDS stands for: Low Voltage Differential Signaling.
Revision 3.0 (Gen 3) due out in 2010 increases the speed to 8GT/s and changes the encoding to 128b/130b to reduce the over head. The new bandwidth will increase from 4Gb/s (Gen 2) to 7.99Gb/s both from over head reduction and bit time reductions. Note; Giga-Transfers per Second (GT/s)


LVDS Electrical Interface
LVDS Single Link Interface Circuit

The basic LVDS interface is a single differential link in either one or both directions. Each link requires a termination resistor at the far [receiver] end. The nominal resistor values used is 100 ohms, but would depend on the cable or PWB trace impedance used. LVDS is a scalable bus; one uni-directional link or multiple links may be used. The LVDS graphic above indicates a 1-meter length, but the PCIe specification only allows a 20 inch trace. Refer to the LVDS page for additional information. The new PCIe version 2.0 supports cables up to 10 meters in length running at 2.5 Gb/s.

PCI Express Status

The PCI Express bus started showing up on Mother Boards in 2004 as an addition (using a new connector) to the PCI interface, and will coexist and out-pace parallel PCI at the rate PCI took over from the ISA bus. One common PCIe implementation seems to have two 1x PCI Express slots [for expansion boards] and one 16x PCIe slot [used to replace the AGP slot], then some number of standard parallel (classic) PCI slots [3 to 4 connectors]. Because of the large number of PCI boards fielded it may be some time before the PCI expansion slots disappear from mother-boards, but may disappear faster because the PCIe 1x connector is so much smaller then the PCI connector. The 1x PCIe slots will support a bandwidth of 5Gbps, and the 16x PCIe slot will support 80Gbps. Throughput is discussed below.

I see some Mother Board manufacturers using the term PCI-E to represent PCI Express card slots, this is an incorrect usage [PCIe]. PCI Express is not compatible with the standard PCI bus. The PCI Express connectors, signal voltage levels, and signal format are different then with PCI. The physical size of PCI Express cards have the same dimensions as standard PCI cards. The main physical difference between the two bus formats lay with the connectors. PCI Express comes as either standard or low-profile form factors.

Additional Notes: Some software written for the PCI bus may be compatible with the PCIe bus. PCI Express was originally developed at Intel by the Arapahoe working group. Later called 3GIO, "third-generation input/output". Now that the spec has been transferred to the PCI Special Interest Group (PCI-SIG) it was renamed PCI Express.

PCI Express Pinout

The pinout for expansion slots found on Personal Computers is listed below. Two types of PCIe connectors are common on PCs; the 1x connector which is used for a normal board expansion slot and the 16x connector which is used as a video card expansion slot. The 4x and 8x style connectors have not yet been seen residing on any mother-board.
PCI-Express 1x Connector Pinout and 1x signal names.
PCI-Express 4x Connector Pinout and 4x signal names.
PCI-Express 8x Connector Pinout and 8x signal names.
PCI-Express 16x Connector Pinout and 16x signal names.

The signaling width [data path width] also uses the term "by"; 1x is called 'by one', 16x is called 'by sixteen' ~ you may also see 16x as x16, means the same thing.

Connectors manufacturers which produce PCIe connectors are listed near the end of this page. Connectors for the 1x PCIe slot and the 16x PCIe slot are different sizes because they support a different number of bit lanes. The connector sizes for 4x and 8x PCI Express are also different, for the same reason. The PCIe 1x connector has 36 signal pins, the 4x connector has 64 signal pins, the 8x connector has 98 signal pins, and the 16x connector has 164 signal pins. A PCI express card is upward compatible, so a 1x card will fit in any card slot, a 4x card will fit into an 8 or 16x port and so on. An adaptor card using 16x lanes will only fit in a x16 size connector. The pinout tables for each connector type is listed in the previous paragraph. Manufacturers that produce PCI-Express Boards are listed on the PCI Express Card Manufacturers page.
A drawing showing the long and shot form factors for the PCI Express card is listed on the PCIe Board Dimensions


PCI Express Protocol

The frame format for PCIe is shown in the graphic below. The frame is made up of a 1-byte Start-of-Frame, 2-byte Sequence Number, 16 or 20-byte Header, 0 to 4096-byte Data field, 0 to 4-byte ECRC field, 4-byte LCRC, and 1-byte End-of Frame. The smaller the number of bits transferred in the data field the greater the over-head becomes. A zero byte data field results in a 100 percent over-head, because no data was transferred.


Graphic of PCI Express Protocol Format and PCIe Message Frame
PCI Express Data Frame

The best case through-put is achieved when the data field is max-ed out with 4096 bytes of data. Using those conditions a total of 4124 bytes will be transferred representing 4096 bytes of data.
Note: End-to-end Cyclic Redundancy Check (ECRC) is 32-bits, Local Cyclic Redundancy Check (LCRC) is 32-bits

PCI Express Throughput

The Throughput Rates for the PCIe interface is for one direction only. PCI Express is a serial bus which embeds its clock unlike the other bus standards listed here. The throughput of a PCI Express interface is reduced by 20 percent due to the 8B/10B data encoding. The table accounts for the 8-bit/10-bit encoding loss: at a 2.5Gbps clock speed, the 1x transfer rate of should be 312.5MBps with 8 bits per clock [without 8B/10B], but at 10 bits per clock the transfer rate becomes 250MBps [with 8B/10B].


Actual Throughput Rates
Bus Spec Transfer Rate Throughput Rate
PCI; 33MHz, 32-bit 133MBps -
PCI-Express x1 250MBps -
AGP 2x 533MBps -
PCI-Express x4 1,000MBps -
AGP 4x 1,066MBps -
AGP 8x 2,133MBps -
PCI-Express x16 4,000MBps -

Refer to this page for a comparison of Video bus through-put for different expansion buses.

PCI Express Design Data

PCI Express is optimized for a 4 layer FR4 [Dielectric], supporting up to 20 inch distances between devices. The actual distance between IC's depend on the number of via's. The differential trace impedance is defined as 100 ohms + 15%. Each trace pair should have a matched trace length of + 5 mils. How ever pair-to-pair trace length matching is not required. Each signal pair is capacitive coupled at the receiver. Do not stager the capacitors for each signal pair, they should reside next to each other. Jitter in the PCI Express Interface: PCI Express specifies a maximum output jitter of 120ps for the Serializer and a minimum input jitter tolerance of 240ps for the De-serializer. The UI [Unit Interval] is the bit time = 400ps, Phase Jitter most important. The UI of 400ps is 1/[2.5Gbps]. The Bit Error Rate [BER] is defined as 1x10-12.




Addition Power Connector
PinSignal18 AWG Wire Color
1+12V4Yellow / Green Strip
2+12V4Yellow / Green Strip
3+12V4Yellow / Green Strip
4COMBlack
5COMBlack
6COMBlack

Also see the COTS Card page for manufacturers of PCIe cards, or the Mother Board page for manufacturers of Mother Boards with PCIe slots.
Other pages of interest include: the PCI Bus page, or the cPCI Bus Interface page.

{PCI Express Bus Index}


PCI Express Bus Standards / Specifications

Specification:
... PCI Express 1.0 {The personal computer bus specification}
... PCI Express 2.0 {Jan 2007}
... PCI Express 3.0 {Nov 2010}
... Compact PCIxpress {PCI Express [PCIe] on a 3U x 160mm form factor in a Compact PCI [cPCI] environment.
... Industrial PCI Express {[IPCI-E], PICMG 1.3 adds PCI Express to the PCI-ISA Passive Backplane Specification.}
... PCMCIA ExpressCard {ExpressCard is the new form factor for PCMCIA Circuit Cards and will utilize either USB and PCI Express buses.}
... Mini PCI Express {MiniPCI Express is designed for Notebook/Laptop computers to replace the Mini-PCI card design, Mini PCI Express is 51mm x 30mm.}

PCISIG; Peripheral Component Interconnect - Special Interest Group [www.pcisig.com].

Additional information for interface standards which use PCIe as the electrical interface are provided below:
ExpressCard:, PCMCIA format with PCIe interface [in a different Form Factor]
Mini PCI Express Bus: PCI over a differential serial link in a small form factor for Laptops.

The PCI Express physical layer discussed on this page is not compatible with the PCI bus, but for completeness the different types of PCI form factors is provided in the list below.

PCI Bus Form Factors

Refer to the PCI page for complete Parallel PCI information, additional PCI specifications are listed below [Note these specs are not mechanically or electrically compatible to the PCI Express specification, but the software may still operate. The term Form Factor relates to the card size and shape and not the electrical interface, So the electrical specification for the PCI interface may exist in any number of mechanical standards, as described below. This page deals with electrical aspects of PCIe, and the mechanical aspects of PCIe as found in a personal computer, other form factors are possible and is provided on other pages.

PCI in different form factors;
  PCI: The original specification 'Peripheral Component Interface', @ Rev 2.1
  Mini PCI: PCI in a small form factor for Laptops, 59.75 mm x 50.95 mm x 5mm. 32 bit data bus running at 3.3v
  PCI-X: The latest version 64 bits at: PCI-X 66, PCI-X 133, PCI-X 266 and PCI-X 533 [4.3GBps]
  cPCI, Compact PCI: PCI in a VME form factor, 3U/6U using 2mm connectors
  PC104-Plus: PCI add-on to the PC104 spec, ISA in a square form factor
  PISA: PCI add-on with PCAT in the ISA AT form factor
  P2CI: PCI on the VME64 P2 connector
  PMC: PCI on a Mezzanine Card, 'PMC'
  PXI cPCI for Instrumentation
  IPCI: Industrial PCI (Another version of cPCI}
  Serial PCI: PCI on a serial link
  Card Bus: 32 bit PCI on the PC Card (PCMCIA) Format

{PCI Express Bus Index}



PCI Express Bus Interface IC Vendors

Like other PC buses, there are no glue logic devices just ASICs and chip sets in PCI Express; Similar to PCI. Refer to the LVDS page for additional information on the LVDS electrical interface. This page provides a comparison of Interface Switching levels for different types of electrical standards.
The clocking scheme used in PCIe is called HCSL for High Speed Current Steering Logic.
HCSL Clock Oscillator Manufacturers

Broadcom Corporation {HyperTransport System I/O Controller, 17 PCI-E links with support for up to four controllers}

Eureka Technology, Inc. {PCI-Express Bus IC Controller}

Faraday Technology Corporation. {IP: PCI-Express PHY and controller}

Genesys Logic, Inc {PCI Express PHY Interface (PPI) PHY IP Core}

IDT {PCI Express Switches; 12-lane/24-lane, 3-port PCIe switch}

LSI Corporation {PCI Express IC interface cores}

MosChip Semiconductor {Single lane PCI Express (PCI-e) based Peripheral Controller}

nxp {2.5-Gbps PCI Express PHY transceiver with an 8-bit data PXPIPE interface}

PLX Technology, Inc {PCI Express Bridges / Switches, PCIe-to-USB 2.0 host controller bridge}

PMC-Sierra {PCI Express Backplane SERDES Devices}

Texas Instruments {PCI Express Bridge Chip to PCI, PCIe Bridge to 1394a}

Xilinx {PCI Express intellectual property (IP) FPGA core}

PCI Express [PCIe] uses a pair of LVDS drivers and receivers, and is not compatible with the legacy PCI bus [which does not use differential transceivers]


PCIe Bridge; PCI Express bridge chip is designed for migration from the legacy PCI bus to the PCI Express interface.
PCIe Switch; A component that receives two or more PCI Express Bi-directional lanes and switches one of them to a single PCI Express Bi-directional lane.

{PCI Express Bus Index}



PCI Express Connector Manufacturers

PCIe uses 4 different sizes of connector, all of which are card-edge type to accept a PCI Express card using card-edge fingers spaced on a 1.00mm pitch [0.394 inches]. The 1x size is the smallest with 36 contact positions. The x4 uses 64 contacts, the x8 uses 98 contacts, and the x16 has 164 contact positions. The nominal height of the connector above the PWB is 11mm. The width of the 1x and 16x connector is 8.70mm as shown below, how ever the 1x graphic is shown slightly larger.

PCIe 1x Connector by AVX AVX PCIe 16x Connector
Mechanical Drawing for PCI Express Connector

AVX {1x, 4x, 8x, 16x PCI Express Card Edge Connector, 36 Way, 64 Way, 96 Way, 164 Way Connectors, 164-pin w/Latch}

FCI {1x, 4x, 8x, 16x PCI Express* Straddle-Mount Card Edge Connector, Vertical-mount PCIe connector}

Meritec {Right Angle X1, X4, X8 and X16 PCI Express Connectors (PCIe)}

Samtec Inc. {PCI Express Socket; 36, 64, 98 and 164 Positions, Through Hole and Edge Mount. RoHs Compliant}

Tyco Electronics {PCI Express Connectors for x1, x4, x8, and x16 lanes}

{PCI Express Bus Index}

This FAQ will reside during the transition from PCI to PCIe, and then removed

Common Questions from up-scale PC builders and gamers:

1 Can I use a PCI card in a PCI Express card slot; No the electrical and physical interfaces are completely different ~ The card does not fit.
2 Can I use a PCI Express card in a PCI card slot; No electrical and physical interfaces are completely different.
3 Can I make a dongle to convert PCI card in a PCI Express card slot; No not with out a major design effort.
4 Is the PCI Express card slot faster than a PCI card slot; Yes, much faster, see the discussion above.
5 I'm an over-clocker, do I need a Parallel PCI slot, No it's older technology operating at a reduced speed.
6 Can I convert a PCI card into a PCI Express card slot; No, Not really, with out a major engineering effort.
7a Why would I want a Parallel PCI bus slot; to use older PCI cards currently being produced in the market place.
7b Why would I want a Parallel PCI bus slot; To allow legacy cards to function in a newer backplane, saving the cost of re-purchasing the board.
8 Can I use two PCI Express Video cards in one motherboard; Sure if the system supports it.
9 What mother board supports two x16 PCIe slots; only seen in Work Stations and newer motherboards.
10 What is the speed increase of PCIe over PCI; The raw speed of the PCI bus is 133MBps, while PCIe is 250MBps [for the x1 rate].
11 What is the speed increase of PCIe over AGP; The raw speed of the AGP bus is 2.1GBps, while PCIe is 4GBps [for the x16 rate].
12 Can I use my AGP card in the new PCIe mother board I just purchased; no.
13 Will a PCIe expansion slot accept any PCIe card; no, make sure your power supply will handle the increased load.

{PCI Express Bus Index}


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