168 pin DRAM DIMM (Unbuffered) Pinout


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Personal Computer Memory Module description, 168-pin DIMM Pin out.
The 168-pin DIMM have 84 pins per PWB side.
The Front Side board pinout contains left side pins 1-42, and right side pins 43-84.
The Back Side board pinout has left side pins 85-126, and right side pins 127-168.
168-pin DIMM memory modules would be found in Desktop computers.

Front, Left Side Signals

168-Pin SDRAM DIMM PinOut
Pin # Non-Parity Parity 72 ECC 80 ECC Pin Description
1 VSS VSS VSS VSS Ground
2 DQ0 DQ0 DQ0 DQ0 Data 0
3 DQ1 DQ1 DQ1 DQ1 Data 1
4 DQ2 DQ2 DQ2 DQ2 Data 2
5 DQ3 DQ3 DQ3 DQ3 Data 3
6 VCC VCC VCC VCC +5 VDC or +3.3 VDC
7 DQ4 DQ4 DQ4 DQ4 Data 4
8 DQ5 DQ5 DQ5 DQ5 Data 5
9 DQ6 DQ6 DQ6 DQ6 Data 6
10 DQ7 DQ7 DQ7 DQ7 Data 7
11 DQ8 DQ8 DQ8 DQ8 Data 8
12 VSS VSS VSS VSS Ground
13 DQ9 DQ9 DQ9 DQ9 Data 9
14 DQ10 DQ10 DQ10 DQ10 Data 10
15 DQ11 DQ11 DQ11 DQ11 Data 11
16 DQ12 DQ12 DQ12 DQ12 Data 12
17 DQ13 DQ13 DQ13 DQ13 Data 13
18 VCC VCC VCC VCC +5 VDC or +3.3 VDC
19 DQ14 DQ14 DQ14 DQ14 Data 14
20 DQ15 DQ15 DQ15 DQ15 Data 15
21 CB0 CB0 CB0 CB0 Parity/Check Bit Input/Output 0
22 CB1 CB1 CB1 CB1 Parity/Check Bit Input/Output 1
23 VSS VSS VSS VSS Ground
24 NC NC NC CB8 Parity/Check Bit Input/Output 8
25 NC NC NC CB9 Parity/Check Bit Input/Output 9
26 VCC VCC VCC VCC +5 VDC or +3.3 VDC
27 /WE0 /WE0 /WE0 /WE0 Read/Write Input
28 /CAS0 /CAS0 /CAS0 /CAS0 Column Address Strobe 0
29 /CAS1 /CAS1 /CAS1 /CAS1 Column Address Strobe 1
30 /RAS0 /RAS0 /RAS0 /RAS0 Row Address Strobe 0
31 /OE0 /OE0 /OE0 /OE0 Output Enable
32 VSS VSS VSS VSS Ground
33 A0 A0 A0 A0 Address 0
34 A2 A2 A2 A2 Address 2
35 A4 A4 A4 A4 Address 4
36 A6 A6 A6 A6 Address 6
37 A8 A8 A8 A8 Address 8
38 A10 A10 A10 A10 Address 10
39 A12 A12 A12 A12 Address 12
40 VCC VCC VCC VCC +5 VDC or +3.3 VDC
41 VCC VCC VCC VCC +5 VDC or +3.3 VDC
42 NC NC NC NC No Connection

Front, Right Side Signals

168-Pin SDRAM DIMM PinOut
Pin # Non-Parity Parity 72 ECC 80 ECC Pin Description
43 VSS VSS VSS VSS Ground
44 /OE2 /OE2 /OE2 /OE2  
45 /RAS2 /RAS2 /RAS2 /RAS2 Row Address Strobe 2
46 /CAS2 /CAS2 /CAS2 /CAS2 Column Address Strobe 2
47 /CAS3 /CAS3 /CAS3 /CAS3 Column Address Strobe 3
48 /WE2 /WE2 /WE2 /WE2 Read/Write Input
49 VCC VCC VCC VCC +5 VDC or +3.3 VDC
50 NC NC NC CB10 Parity/Check Bit Input/Output 10
51 NC NC NC CB11 Parity/Check Bit Input/Output 11
52 NC CB2 CB2 CB2 Parity/Check Bit Input/Output 2
53 NC CB3 CB3 CB3 Parity/Check Bit Input/Output 3
54 VSS VSS VSS VSS Ground
55 DQ16 DQ16 DQ16 DQ16 Data 16
56 DQ17 DQ17 DQ17 DQ17 Data 17
57 DQ18 DQ18 DQ18 DQ18 Data 18
58 DQ19 DQ19 DQ19 DQ19 Data 19
59 VCC VCC VCC VCC +5 VDC or +3.3 VDC
60 DQ20 DQ20 DQ20 DQ20 Data 20
61 NC NC NC NC No Connection
62 NC NC NC NC No Connection
63 NC NC NC NC No Connection
64 VSS VSS VSS VSS Ground
65 DQ21 DQ21 DQ21 DQ21 Data 21
66 DQ22 DQ22 DQ22 DQ22 Data 22
67 DQ23 DQ23 DQ23 DQ23 Data 23
68 VSS VSS VSS VSS Ground
69 DQ24 DQ24 DQ24 DQ24 Data 24
70 DQ25 DQ25 DQ25 DQ25 Data 25
71 DQ26 DQ26 DQ26 DQ26 Data 26
72 DQ27 DQ27 DQ27 DQ27 Data 27
73 VCC VCC VCC VCC +5 VDC or +3.3 VDC
74 DQ28 DQ28 DQ28 DQ28 Data 28
75 DQ29 DQ29 DQ29 DQ29 Data 29
76 DQ30 DQ30 DQ30 DQ30 Data 30
77 DQ31 DQ31 DQ31 DQ31 Data 31
78 VSS VSS VSS VSS Ground
79 NC NC NC NC Not connected
80 NC NC NC NC Not connected
81 NC NC NC NC Not connected
82 SDA SDA SDA SDA Serial Data
83 SCL SCL SCL SCL Serial Clock
84 VCC VCC VCC VCC +5 VDC or +3.3 VDC

Back, Left Side Signals

168-Pin SDRAM DIMM PinOut
Pin # Non-Parity Parity 72 ECC 80 ECC Pin Description
85 VSS VSS VSS VSS Ground
86 DQ32 DQ32 DQ32 DQ32 Data 32
87 DQ33 DQ33 DQ33 DQ33 Data 33
88 DQ34 DQ34 DQ34 DQ34 Data 34
89 DQ35 DQ35 DQ35 DQ35 Data 35
90 VCC VCC VCC VCC +5 VDC or +3.3 VDC
91 DQ36 DQ36 DQ36 DQ36 Data 36
92 DQ37 DQ37 DQ37 DQ37 Data 37
93 DQ38 DQ38 DQ38 DQ38 Data 38
94 DQ39 DQ39 DQ39 DQ39 Data 39
95 DQ40 DQ40 DQ40 DQ40 Data 40
96 VSS VSS VSS VSS Ground
97 DQ41 DQ41 DQ41 DQ41 Data 41
98 DQ42 DQ42 DQ42 DQ42 Data 42
99 DQ43 DQ43 DQ43 DQ43 Data 43
100 DQ44 DQ44 DQ44 DQ44 Data 44
101 DQ45 DQ45 DQ45 DQ45 Data 45
102 VCC VCC VCC VCC +5 VDC or +3.3 VDC
103 DQ46 DQ46 DQ46 DQ46 Data 46
104 DQ47 DQ47 DQ47 DQ47 Data 47
105 NC CB4 CB4 CB4 Parity/Check Bit Input/Output 4
106 NC CB5 CB5 CB5 Parity/Check Bit Input/Output 5
107 VSS VSS VSS VSS Ground
108 NC NC NC CB12 Parity/Check Bit Input/Output 12
109 NC NC NC CB13 Parity/Check Bit Input/Output 13
110 VCC VCC VCC VCC +5 VDC or +3.3 VDC
111 NC NC NC NC No Connection
112 /CAS4 /CAS4 /CAS4 /CAS4 Column Address Strobe 4
113 /CAS5 /CAS5 /CAS5 /CAS5 Column Address Strobe 5
114 /RAS1 /RAS1 /RAS1 /RAS1 Row Address Strobe 1
115 NC NC NC NC No Connection
116 VSS VSS VSS VSS Ground
117 A1 A1 A1 A1 Address 1
118 A3 A3 A3 A3 Address 3
119 A5 A5 A5 A5 Address 5
120 A7 A7 A7 A7 Address 7
121 A9 A9 A9 A9 Address 9
122 A11 A11 A11 A11 Address 11
123 A13 A13 A13 A13 Address 13
124 VCC VCC VCC VCC +5 VDC or +3.3 VDC
125 NC NC NC NC No Connection
126 NC NC NC NC No Connection

Back, Right Side Signals

168-Pin SDRAM DIMM PinOut
Pin # Non-Parity Parity 72 ECC 80 ECC Pin Description
127 VSS VSS VSS VSS Ground
128 NC NC NC NC No Connection
129 /RAS3 /RAS3 /RAS3 /RAS3 Column Address Strobe 3
130 /CAS6 /CAS6 /CAS6 /CAS6 Column Address Strobe 6
131 /CAS7 /CAS7 /CAS7 /CAS7 Column Address Strobe 7
132 NC NC NC NC No Connection
133 VCC VCC VCC VCC +5 VDC or +3.3 VDC
134 NC NC NC CB14 Parity/Check Bit Input/Output 14
135 NC NC NC CB15 Parity/Check Bit Input/Output 15
136 NC CB6 CB6 CB6 Parity/Check Bit Input/Output 6
137 NC CB7 CB7 CB7 Parity/Check Bit Input/Output 7
138 VSS VSS VSS VSS Ground
139 DQ48 DQ48 DQ48 DQ48 Data 48
140 DQ49 DQ49 DQ49 DQ49 Data 49
141 DQ50 DQ50 DQ50 DQ50 Data 50
142 DQ51 DQ51 DQ51 DQ51 Data 51
143 VCC VCC VCC VCC +5 VDC or +3.3 VDC
144 DQ52 DQ52 DQ52 DQ52 Data 52
145 NC NC NC NC Not connected
146 NC NC NC NC No Connection
147 NC NC NC NC Not connected
148 VSS VSS VSS VSS Ground
149 DQ53 DQ53 DQ53 DQ53 Data 53
150 DQ54 DQ54 DQ54 DQ54 Data 54
151 DQ55 DQ55 DQ55 DQ55 Data 55
152 VSS VSS VSS VSS Ground
153 DQ56 DQ56 DQ56 DQ56 Data 56
154 DQ57 DQ57 DQ57 DQ57 Data 57
155 DQ58 DQ58 DQ58 DQ58 Data 58
156 DQ59 DQ59 DQ59 DQ59 Data 59
157 VCC VCC VCC VCC +5 VDC or +3.3 VDC
158 DQ60 DQ60 DQ60 DQ60 Data 60
159 DQ61 DQ61 DQ61 DQ61 Data 61
160 DQ62 DQ62 DQ62 DQ62 Data 62
161 DQ63 DQ63 DQ63 DQ63 Data 63
162 VSS VSS VSS VSS Ground
163 CK3 CK3 CK3 CK3  
164 NC NC NC NC Not connected
165 SA0 SA0 SA0 SA0 Serial Address 0
166 SA1 SA1 SA1 SA1 Serial Address 1
167 SA2 SA2 SA2 SA2 Serial Address 2
168 VCC VCC VCC VCC +5 VDC or +3.3 VDC

Data width is 64 bits per memory stick [the front side 84 pins are not connected together with the back side 84 pins]

Memory Module Picture
The approximate board size. 5.375" x 1.375"

SIMM: Single Inline Memory Module
DRAM: Dynamic Random Access Memory
SO DIMM: Small Outline Dual Inline Memory Module
SDRAM:: Synchronous DRAM (Random Access Memory), Synchronous to Positive Clock Edge.
FPM:Fast Page Mode: (asynchronous) Obsolete, faster than normal DRAM, used in 386/486 computers.
EDO: Extended Data Out: (asynchronous) A superset of FPM, just faster than FPM.
All 168 pin DIMMs use either 66MHz SDRAM, PC100 SDRAM, PC133 SDRAM, EDO or FPM memory. 168 pin DIMMs have two alignment notches as shown.
The left most notch [keyway] determines the DRAM type. If the notch is centered then the memory module is Buffered DRAM [EDO or Fast Page]. If the notch is off-set to the right then the memory module is either a un-buffered DRAM/SDRAM DIMM or a buffered SDRAM DIMM. The center notch determines the voltage. If the notch is centered then the DIMM operates off 3.3 volts.

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Electronic Design Key words: 168 pin DRAM DIMM (Unbuffered) Pinout, Pin-Out, DIMM: Dual Inline Memory Module, Electrical Standard, DRAM: Dynamic Random Access Memory, Interface Standard, Specification, Spec, Electrical Interface, Semiconductor IC manufacturers, Physical Interface, Engineering Description, electrical characteristics, Pin descriptions, Component Manufacturers, Vendors, Signal Names, Out-dated interface


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Last Modified 4/26/08
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