| Pin Number | Normal Name | Pin Description |
|---|---|---|
| 1 | VSS | Ground |
| 2 | VSS | Ground |
| 3 | DQ0 | Data 0 |
| 4 | DQ32 | Data 32 |
| 5 | DQ1 | Data 1 |
| 6 | DQ33 | Data 33 |
| 7 | DQ2 | Data 2 |
| 8 | DQ34 | Data 34 |
| 9 | DQ3 | Data 3 |
| 10 | DQ35 | Data 35 |
| 11 | VCC | +3.3 VDC |
| 12 | VCC | +3.3 VDC |
| 13 | DQ4 | Data 4 |
| 14 | DQ36 | Data 36 |
| 15 | DQ5 | Data 5 |
| 16 | DQ37 | Data 37 |
| 17 | DQ6 | Data 6 |
| 18 | DQ38 | Data 38 |
| 19 | DQ7 | Data 7 |
| 20 | DQ39 | Data 39 |
| 21 | VSS | Ground |
| 22 | VSS | Ground |
| 23 | /CAS0 | Column Address Strobe 0 |
| 24 | /CAS4 | Column Address Strobe 4 |
| 25 | /CAS1 | Column Address Strobe 1 |
| 26 | /CAS5 | Column Address Strobe 5 |
| 27 | VCC | +3.3 VDC |
| 28 | VCC | +3.3 VDC |
| 29 | A0 | Address 0 |
| 30 | A3 | Address 3 |
| 31 | A1 | Address 1 |
| 32 | A4 | Address 4 |
| 33 | A2 | Address 2 |
| 34 | A5 | Address 5 |
| 35 | VSS | Ground |
| 36 | VSS | Ground |
| 37 | DQ8 | Data 8 |
| 38 | DQ40 | Data 40 |
| 39 | DQ9 | Data 9 |
| 40 | DQ41 | Data 41 |
| 41 | DQ10 | Data 10 |
| 42 | DQ42 | Data 42 |
| 43 | DQ11 | Data 11 |
| 44 | DQ43 | Data 43 |
| 45 | VCC | +3.3 VDC |
| 46 | VCC | +3.3 VDC |
| 47 | DQ12 | Data 12 |
| 48 | DQ44 | Data 44 |
| 49 | DQ13 | Data 13 |
| 50 | DQ45 | Data 45 |
| 51 | DQ14 | Data 14 |
| 52 | DQ46 | Data 46 |
| 53 | DQ15 | Data 15 |
| 54 | DQ47 | Data 47 |
| 55 | VSS | Ground |
| 56 | VSS | Ground |
| 57 | RSVD | Reserved |
| 58 | RSVD | Reserved |
| 59 | RSVD | Reserved |
| 60 | RSVD | Reserved |
| 61 | RFU | Reserved for Future Use |
| 62 | RFU | Reserved for Future Use |
| 63 | VCC | +3.3 VDC |
| 64 | VCC | +3.3 VDC |
| 65 | RFU | Reserved for Future Use |
| 66 | RFU | Reserved for Future Use |
| 67 | /WE | Read/Write |
| 68 | RFU | Reserved for Future Use |
| 69 | /RAS0 | Row Address Strobe 0 |
| 70 | RFU | Reserved for Future Use |
| 71 | /RAS1 | Row Address Strobe 1 |
| 72 | RFU | Reserved for Future Use |
| 73 | OE | Output Enable |
| 74 | RFU | Reserved for Future Use |
| 75 | VSS | Ground |
| 76 | VSS | Ground |
| 77 | RSVD | Reserved |
| 78 | RSVD | Reserved |
| 79 | RSVD | Reserved |
| 80 | RSVD | Reserved |
| 81 | VCC | +3.3 VDC |
| 82 | VCC | +3.3 VDC |
| 83 | DQ16 | Data 16 |
| 84 | DQ48 | Data 48 |
| 85 | DQ17 | Data 17 |
| 86 | DQ49 | Data 49 |
| 87 | DQ18 | Data 18 |
| 88 | DQ50 | Data 50 |
| 89 | DQ19 | Data 19 |
| 90 | DQ51 | Data 51 |
| 91 | VSS | Ground |
| 92 | VSS | Ground |
| 93 | DQ20 | Data 20 |
| 94 | DQ52 | Data 52 |
| 95 | DQ21 | Data 21 |
| 96 | DQ53 | Data 53 |
| 97 | DQ22 | Data 22 |
| 98 | DQ54 | Data 54 |
| 99 | DQ23 | Data 23 |
| 100 | DQ55 | Data 55 |
| 101 | VCC | +3.3 VDC |
| 102 | VCC | +3.3 VDC |
| 103 | A6 | Address 6 |
| 104 | A7 | Address 7 |
| 105 | A8 | Address 8 |
| 106 | A11 | Address 11 |
| 107 | VSS | Ground |
| 108 | VSS | Ground |
| 109 | A9 | Address 9 |
| 110 | NC | No Connect |
| 111 | A10 | Address 10 |
| 112 | NC | No Connect |
| 113 | VCC | +3.3 VDC |
| 114 | VCC | +3.3 VDC |
| 115 | CAS2 | - |
| 116 | CAS6 | - |
| 117 | CAS3 | - |
| 118 | CAS7 | - |
| 119 | VSS | Ground |
| 120 | VSS | Ground |
| 121 | DQ24 | Data 24 |
| 122 | DQ56 | Data 56 |
| 123 | DQ25 | Data 25 |
| 124 | DQ57 | Data 57 |
| 125 | DQ26 | Data 26 |
| 126 | DQ58 | Data 58 |
| 127 | DQ27 | Data 27 |
| 128 | DQ59 | Data 59 |
| 129 | VCC | +3.3 VDC |
| 130 | VCC | +3.3 VDC |
| 131 | DQ28 | Data 28 |
| 132 | DQ60 | Data 60 |
| 133 | DQ29 | Data 29 |
| 134 | DQ61 | Data 61 |
| 135 | DQ30 | Data 30 |
| 136 | DQ62 | Data 62 |
| 137 | DQ31 | Data 31 |
| 138 | DQ63 | Data 63 |
| 139 | VSS | Ground |
| 140 | VSS | Ground |
| 141 | SDA | Serial Data Line |
| 142 | SCL | Serial Clock Line |
| 143 | VCC | +3.3 VDC |
| 144 | VCC | +3.3 VDC |
Data width is 64 bits per memory module, the front side 72 pins are not connected together with the back side 72 pins.

SIMM: Single Inline Memory Module
DRAM: Dynamic Random Access Memory
SO DIMM: Small Outline Dual Inline Memory Module
EDO: Extended Data Out: (asynchronous) A superset of FPM, just
faster than FPM.
The 144 pin SODIMMs have an alignment notch on the bottom [left] center
side.
All 144 pin SODIMM's use either EDO, 66MHz SDRAM, PC100 SDRAM, or PC133
SDRAM memory.
This page provides pinout details for EDO SODIMM SDRAM modules.
This Memory Module device use LVTTL [3.3 volt] compatible IC's.
| Memory Module Speed | Size / Capacity | Style / Description |
| EDO SODIMM | 32MB | 4Mx64 Bits |
| EDO SODIMM | 64MB | 8Mx64 Bits |
| EDO SODIMM | 128MB | 16Mx64 Bits |
Back to the main Computer Memory
Modules information page for a description of memory stick types and
module speed.
For electronic device manufacturers see one of these pages: Memory IC manufacturers, or
Memory Module manufacturers
Electronic Equipment manufacturers are found by selecting the OEM
Equipment icon below, component manufacturers by selecting the Components
icon below.
Electronic Design Key words: 144 pin SODIMM EDO Pinout, SO DIMM, Pin Out, DIMM: Dual Inline Memory Module, Electrical Standard, DRAM: Dynamic Random Access Memory, Interface Standard, Specification, Spec, Electrical Interface, Semiconductor IC manufacturers, Physical Interface, Engineering Description, electrical characteristics, Pin descriptions, Component Manufacturers, Vendors, Signal Names, Out-dated, Obsolete, No up-grade path.
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