FET Derating Guidelines




2N7000 / 2N7002 / NDS7002A MOSFET
N-Channel Enhancement Mode Field Effect Transistor
2N7000 Applications: Servo motor control, power MOSFET gate drivers, switching applications

2N7002 Temperature-Current Derating Curve, TO-18 Package
2N7002 Temperature-Current Derating Curve, TO-18 Can

Use the Temperature-Current graph above to determine how to derate the 2N7002 FET over increasing ambient temperature. The most conservative designer will use the lowest gray curve in the graph, which develops the lowest stress on the junction of the 2N7002. Most designs would use the second gray curve, avoiding the black curve above. The upper most black curve is maximum junction temperature and should be avoided at all times.
An option to the thermal curves are the linear equations listed below.





The leads of the TO-18 should be kept short to increase heat conduction through the leads of the TO-18 into the board, while allowing space between the body of the TO-18 and the surface of the board. Of course forced air could be applied to the system to draw heat away from the component by convection [the graph depicts still air]. A heat sink may also be added to increase heat conduction, with or with out thermal grease.

For reference; How to Read Thermal Derating Graphs.

Packages
2N7000; TO-92 [Plastic through-hole]
2N7002; TO-18 (TO-206AA) [metal Can]
NDS7002A; SOT-23 (TO-236AB) [Plastic SMD]
To increase heat conduction away from the FET package;
Use short leads with the TO-18 or TO-92 packages,
Increase the PCB copper pad size for the plastic SMD package.
TO-18 Package Data

Maximum Power Dissipation (250C)
2N7000; 400mW
2N7002; 200mW
NDS7002A; 300mW

Power Dissipation Equation
(Drain-Source Current [ID])2 x (Drain-Source on-Resistance [Rds])
(Drain-Source Current [ID]) x (Drain-Source on-Voltage [Vds])

Power Derating above 25C [mW/oC]
2N7000; 3.2mW/C
2N7002; 1.6mW/C
NDS7002A; 1.6mW/C

Maximum Operating and Storage Temperature Range
2N7000; -55 to 150C
2N7002; -55 to 150C
NDS7002A; -65 to 150C
It's not that common to have an identical operating and storage temperature.

FET Derating Guidelines, and Transistor Derating Guidelines

Compensating for temperature rise by Derating Electronic Components.




TO-18 Package Style with pin-out
TO-18 Package





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Modified 1/24/12
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