LPC

Low Pin Count

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LPC Description

The Low Pin Count [LPC] Bus, may also be called PPC.
The LPC Interface allows the legacy I/O motherboard components, typically integrated in a Super I/O chip, to migrate from the ISA/X-bus to the LPC Interface.
The LPC Interface Specification describes memory, I/O and DMA transactions, and uses the PCI 33MHz clock.

LPC was developed by Intel. The version of the specification I've seen dates to 2002.

The Low Pin Count interface specification makes a number of references to the ISA bus, so this may have been a transitional interface during the ISA / PCI trade-off phase ~ during the time an ISA expansion slot resided next to a PCI expansion slot.

The LPC interface is motherboard only and does not use a connector, or provide an expansion slot.

This may be a legacy interface as the ISA and PCI buses are replaced by the PCIe interface.

Comprehensive list of IC-to-IC Buses. Use the Buses icon below for additional computer bus descriptions, pinout tables, and interface IC manufacturers.

Electronic Engineering Design Key words: Low Pin Count Bus, LPC protocol, IC Buses, Integrated Circuit Bus types, Interface Standard Data Bus, Specification, Spec, Interface, IC, Physical Interface, Topology, Description, Physical Interface, Legacy, Out-dated.

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Last Modified 2/16/08
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