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Mezzanine boards are small form factor cards designed to plug onto larger form factor boards. The larger main boards can be designed to support one or more Mezzanine boards. Not all mezzanine formats are supported by the main boards.
IP: IndustryPack; ANSI/VITA 4 1996
The IP board uses two connectors and two different board sizes. Single
width boards are; 1.8" x 3.9". Double width boards are; 3.6" x 3.9". Up
to four single width cards, or two double width cards will fit onto a
standard 6U VME card.
The pinouts listed below are staggered as the pins on the 50-pin
connector are staggered. Another 50 pin connector is also called out in
the standard, but the pin out is not defined. The connector is optional,
with the signals routed one for one to a 50-pin header on the main board.
A double wide card will have 4 50-pin connectors. The 3 additional
connector pin outs are not defined in the IP specification, they are used
for I/O signals. The IP electrical interface uses standard 5 volt CMOS
levels [74HCTxx] and may operate at either 8MHz or 32MHz. How ever the
Ack* pin may be driven by a CMOS or TTL device. All signals have a 10k ohm
Pull-Up resistor located on the
IP card.
PICMG 2.4 R1.0: specifies the IP I/O Pin Assignments on CompactPCI; defines user I/O pin mappings from ANSI/VITA
standard IP sites to J3/P3, J4/P4 and J5/P5 on a CompactPCI.
| Pin # | Signal | Pin # | Signal | Pin # | Signal | Pin # | Signal |
|---|---|---|---|---|---|---|---|
| 1 | GND | 2 | CLK | 26 | GND | 27 | +5v |
| 3 | Reset* | 4 | D0 | 28 | R/W* | 29 | IDSEL* |
| 5 | D1 | 6 | D2 | 30 | DMAReq0* | 31 | MemSel* |
| 7 | D3 | 8 | D4 | 32 | DMAReq1* | 33 | IntSel* |
| 9 | D5 | 10 | D6 | 34 | DMAck* | 35 | IOSel* |
| 11 | D7 | 12 | D8 | 36 | Reserved | 37 | A1 |
| 13 | D9 | 14 | D10 | 38 | DMAEnd* | 39 | A2 |
| 15 | D11 | 16 | D12 | 40 | Error* | 41 | A3 |
| 17 | D13 | 18 | D14 | 42 | IntReq0* | 43 | A4 |
| 19 | D15 | 20 | BS0* | 44 | IntReq1* | 45 | A5 |
| 21 | BS1* | 22 | -12v | 46 | Strobe* | 47 | A6 |
| 23 | +12v | 24 | +5v | 48 | Ack* | 49 | Reserved |
| 25 | GND | -- | -- | 50 | GND | -- | -- |
IP Industry Pack Description {groupipc.com}
CMC: Common Mezzanine Card. IEEE 1386 Standard Mechanics for a
Common Mezzanine Card Family.
Defines the mechanical specification for the IEEE 1386 series of
Mezzanine Cards. The card size is 74mm x 149mm x 8.2mm (single width) or
149mm x 149mm x 8.3mm (double width). IEEE1386 uses Board-to-Board 1.00mm
(.039") Dual Row connectors. Mezzanine cards, designed to this standard,
can be used interchangeably on VME, VME64 and VME64x boards, CompactPCI,
Multibus I, and Multibus II boards. Additional standards define the board
pinout to backplane pin outs.
Back to Mezzanine Buses page.
Engineering Key words: Mezzanine Bus, IndustryPack, IP, PCI Mezzanine Card, AMC, PMC, PC MIP, Common Mezzanine Card, CMC Bus, Standard, Interface Standard, Specification, Spec, Electrical Interface, IC, Parallel Bus, Physical Interface, Embedded Parallel Computer Bus, Electronic connector Description, Daughter Card Component Manufacturers, Card Dimensions, Board form factor, PCB width, Mezzanine, IEEE Standards: IEEE 1386 and IEEE 1386.1, I/O schemes, Module, Carrier.
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