How to Handle Tr-State Output Pins

Tri-State Output pins should be tied to a valid logic level so the output remains fixed at a valid voltage level when the device enters TriState. Devices with Three-State outputs may be connected in parallel. Because only one Three-State output should be active at any given time the calculation for the pull-up resistor is the same as a normal pull-up.

V_IH [max] V_cc [min] - {V_Resistor [min] x I_IH [max]}

Another equation is used for the case when all the Tri-State devices are off, leaving the receiving gate floating. The following equation is used to calculate a pull-up value so that the receiving gate is pulled high before the input rises [floats] into the transition region of the gate. To large a resistor value will slow the rise time of the gate voltage causing the voltage to linger in the transition region leading to output oscillation. The value is chosen to pull the line high before the gate floats to 0.8v. The not to exceed float time is calculated from the leakage current on the line [I_OZ] and the load capacitance [C].

Voltage/Time = I_OZ / C = 20uA / 20pF = 1v/uS [these are example numbers used for the calculation]
So with in 0.8uS [800nS] the input will float to 0.8v

The formula for the required resistor value is:
V_t = V_CC - [e^-t/RC_T(V_CC - V_i]
     V_t = 2v, minimum voltage at time t
     V_i = 0.5v, initial voltage
     V_CC = Supply voltage
     C_T = Total Capacitance, R = Pullup resistor
     t = maximum input rise time.

The Resistor calculation: R = (t / 0.4 x C_T). The capacitance is the trace and the addition of all the devices on the line.

How to terminate Open Collector Output pins
How to tie off Unused Input pins
Why not to terminate Bus-Hold Input Pins

Tri-State Output

Standard Tri-Stateable Output [1G not]
Bi-directional Transceiver with direction control [1DIR]

Terms -
V_CC: The voltage applied to the power pin(s). In most cases the voltage the device needs to operate at.
V_IH: [Voltage Input High] The minimum positive voltage applied to the input which will be accepted by the device as a logic high.
V_IL: [Voltage Input Low] The maximum positive voltage applied to the input which will be accepted by the device as a logic low.
V_OL: [Voltage Output Low] The maximum positive voltage from an output which the device considers will be accepted as the maximum positive low level.
V_OH: [Voltage Output High] The maximum positive voltage from an output which the device considers will be accepted as the minimum positive high level.
V_T: [Threshold Voltage] The voltage applied to a device which is "transition-Operated", which cause the device to switch. May also be listed as a '+' or '-' value.

**Related pages on this site:**
. Standard Logic Voltage Thresholds .	. Bus Logic Thresholds .	. Logic Speed x Power Chart .	. Trace Termination .	. Ground/Power Planes .

Back to the Logic Design Page.

Design Key words: Resistor, Pull-Up, Pullup, Pull-Down, Pulldown, Tri-State Output, Floating input, Intermittent operation, Random failure, Glue Logic Families,
CMOS, TTL, ECL, Sink Current, IC, Integrated Circuits, Logic Types, logic switching levels, Output voltage, Low-Voltage, Threshold Voltage, 74xx, 74AC00,
74HC, 74AHC00, Digital Devices, Description, Definition for Logic family, Logic Terms, TTL: Transistor Transistor Logic, ECL: Emitter Coupled Logic,
CMOS: Complementary Metal-Oxide Semiconductor, BICMOS: Bipolar Complementary Metal Oxide Semiconductor, Electronic Devices, Equation, Formula, Calculation


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