The slew rate of a device is the rate of change of it's output [from
high to low, or from low to high]. Or the amount of time it takes an
IC to switch from 10% to 90% of it's final value in a given time. This
graphic provides an equation for determining IC slew rate. The
formula requires the signal rise time, and the output low and high
voltages. Some devices may have a different rise time and a different
fall time, so pick the faster of the two. The reason why the
switching time from low to high or high to low will differ in some
devices depend on the internal structure of the device. Some ICs may
have a different value of internal resistor between the Vcc line to
output and a different value between the the output and ground.
Normally the resistance is due to the on-resistance of a FET.
|
Device | F | ALS | ABT | AC | HC | AHC | AHC | LVT | ALVC | LVC | LV |
Propagation Delay {nS} |
4 | 6 | 2.7 | 5 | 13 | 5.5 | 8.3 | 2.4 | 2.0 | 4.5 | 10 |
Voltage Swing {V} |
3 | 3 | 3 | 4.8 | 4.8 | 4.8 | 3 | 3 | 3 | 3 | 3 |
Slew Rate {V/nS} |
1.3 | 1.0 | 1.0 | 2.0 | 0.9 | 0.8 | 0.5 | 1.2 | 1.3 | 0.9 | 0.7 |
- | VCC = 5.0v | VCC = 3.3v |
Slew Rate change because of slow input rise time
Slew rate, and rise times is also effected by what is connected to
the devices output. An IC's rise time may slow as the number of
devices the IC has to drive increases. There really are no logic
families with very long rise times. Slow rise times these days are
considered to be longer then 50nS. However; Slow rise times could be
produced by 3-state outputs which are not pulled high [for example],
or devices which need to drive large capacitive loads. The 3-state
outputs produce slow slew rates, because the floating receiver
charges up based on its leakage current (10uA to 20uA). Large
capacitive loads cause slow rise times because the driver needs to
charge up the capacitor. The rise time is then based on the RC time constant of the circuit, and the
amount of current the IC can deliver. Typical rise and fall times for
most logic devices will range from between 1nS and 4nS. |
IC Switching Terms - |
VCC: The voltage applied to the power pin. |
VIH: [Voltage Input High] The minimum positive voltage applied to the input which will be accepted by the device as a logic high. |
VIL: [Voltage Input Low] The maximum positive voltage applied to the input which will be accepted by the device as a logic low. |
VOL: [Voltage Output Low] The maximum positive voltage from an output which the device considers will be accepted as the maximum positive low level. |
VOH: [Voltage Output High] The maximum positive voltage from an output which the device considers will be accepted as the minimum positive high level. |
VT: [Threshold Voltage] The voltage applied to a device which is "transition-Operated", as in a flip flop, which causes the device to switch. May also be listed as a '+' or '-' value. |
Description of TTL, ECL and CMOS Glue Logic Families |
|
Standard Logic Voltage Thresholds | Interface Bus Logic Thresholds | Glue Logic Speed x Power Chart | How to Termination Traces | Resistor Pull-up |
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