How to Handle Bus-Hold Input Pins

Logic Vol and Voh diagram [Voltage output-low vs Volatge Output-High]

Unused Input pins should be tied to a valid logic level so the input remains fixed at a valid voltage level. Unused inputs are susceptible to noise which could cause the output to switch. Unused or floating inputs may "act" one way [as a logic 1] while they appear another when probed [as a logic 0 or invalid voltage] ~ which may lead to confusion during debug. Normally the unused pin will be tied to Vcc or ground; however, they may also be tied to a used input of the same chip (if it happens to be a glue logic OR gate, or AND gate...}

Bus-Hold Input Pins, Pull-up resistors should not be used with an IC that has Bus-Hold. An IC with Bus-Hold prevents a floating line by providing a small amount of positive feedback current on the IC input pin. Glue logic ICs which contain Bus-Hold will have an 'H' in their part number. In this case the 'H' does not mean 'High-Speed' as it did with some older TTL and CMOS logic families. Circuit with Bus-Hold should be used in place of a resistor. In addition, a Bus-Hold does not require the input line to be tied high or low, the line may be left open [floating]. Bus-Hold circuit consume in the range of 50 to 75uA of current to hold the line in its last state. A current of 500uA [per connected pin] is required to 'Over-Drive' the circuit causing it to change state.

Bus Hold Input pin feed-back circuity

Adding a pull-up resistor to a pin with Bus-Hold will cause higher then necessary current demand. If the pull-up is small enough [increasing the load current], the driver may not be able to switch in the time required. Thevenin or parallel terminated lines are not recommended because of their very low values.

Follow the equations below in the event a resistor is used on a Bus-Hold input with a totem-pole output driver.
Vcc = 3.3v, Vin = 0.8v (@ 75uA hold spec)
Rpull-up = (3.3v - 0.8v) / 75uA = 33K ohm resistor pull-up value

Vcc = 3.3v, Vin = 2.0v (@ 75uA hold spec)
Rpull-down = (2.0v) / 75uA = 26K ohm resistor pull-down value
Pull-up resistors used with totem-pole output drivers contend with the driver. So the resistor needs to be scaled to a higher value.

Follow these equations in the event a resistor is used on a Bus-Hold input with an Open-Collector output driver.
Rpull-up = [Vcc minimum - Vtrip] / I BHLO (@ 500uA Bus-Hold switch current)
Rpull-up = [ 3.1v - 1.5v] / 500uA
Rpull-up = 3200 ohms
While Pull-up resistors used with open collector drivers need to be scaled to supply the Bus-Hold switching current; I BHLO [500uA]. There is no contention with the driver on an open collector IC, because the driver will not pull the line high [only low]. The calculation also holds true when a resistor is pulling a switch or other device up from ground or when a resistor is pulling up capacitor from ground, as in an RC circuit timing circuit.

A floating state is defined when the voltage at a gate is determined by the leakage current of the device. Unused CMOS inputs which are left floating will experience a gradual charging of the gate input capacitance. A floating input may see an increase in static current, or if the gate voltage reaches the threshold level start to oscillate. Both the N and P FET outputs will turn on and conduct current simultaneously if the input to a CMOS device is allowed to float. Voltages between 0.8v and 2.0v applied to the inputs will cause a problem, in that the outputs will tend to oscillate. Large numbers of gates left floating, in a 16 bit bus driver for example, will cause large amounts of current to be drawn by the IC. The floating gate charges up at a rate determined by its leakage current. Intermittent or random circuit errors may be seen with floating inputs, as outputs switch to a different state for no apparent reason.

It's good design practice to tie the unused input to Vcc via a resistor to reduce noise susceptibility. The resistor protects the input pin by limiting the current from high going variations in Vcc which could damage the input to the device. The resistor value used as a pull-up may vary between logic families. The number of inputs allowed to be tied to the resistor pull-up also varies with logic families. In fact some device families really don't require a resistor at all. The [old] TTL emitter input logic families required the resistor, while newer TTL families may not because they could accept a higher break down voltage on the input pin [protected by Schottky diodes]. The resistor value does not change based on the protection provided, but by what the input pin requires as a valid logic level. A resistor value of 1K ohm to 5k ohms is common and should work for all logic families as a pull-up.

So determine if parts count or cost come into play with this design, are you building 3 prototypes or 10,000 units [to determine the cost and impact of the resistor]. Next determine if the resistor is really required, check the IC logic family being used, it may or may not require a pull-up resistor.

Calculate the resistor pull-up value: [example CMOS values used]
(1) Check IIH {or maybe just II for same devices}, Input High Current on the data sheet. [10uA]
.....{1a} Use the maximum current value if provided. [20uA]
{2} Determine the input voltage to tie into, normally Vcc, or VIO. [3.3v]
....{2a} Use the minimum voltage value if provided. [3.1v]
{3} Select the resistor tolerance family, which is already being used in the design. [1%]
{4} Check the minimum input high voltage VIH for the device, from the data sheet. [1.8v]
....{4a} Use the maximum value as good design practice [2.52v]
....{4b} Using the minimum results in a loss of noise margin, and absolute worst case, not to exceed value
{5} Calculate the Pull-Up Resistor: Rpull-up
....{5a}Keep the voltage drop {VResistor x IIH} from dropping the VIH below minimum.
....{5b} Use the maximum value in the calculation as good design practice [2.52v]. The equation is listed below.
        VIH Vcc [min] - {VResistor [min] x IIH [max]}
        1.8v VIH-Min 3.1v - {1k x 20uA} = 3.1v - 0.02 = 3.08 {This works}
        1.8v VIH-Min 3.1v - {47k x 20uA} = 3.1v - 0.94 = 2.16 {This works, but produces a loss of noise margin of 0.8v}
        2.52v VIH-Max 3.1v - {1k x 20uA} = 3.1v - 0.02 = 3.08 {This works}
        2.52v VIH-Max 3.1v - {22k x 20uA} = 3.1v - 0.44 = 2.66 {This works, without a loss in noise margin, see below for slow input voltage rise time}
Note: The example uses 10uA (20uA worst case) for gate leakage current. For any gate, Leakage current doubles for each 10oC increase in temperature above the data sheet (25oC)
....{5c} Use this equation for CMOS inputs which may tend to oscillate with slow rise times.
        Vt = VCC - [e-t/RCT(VCC - Vi]    Describe under the Tri-State section below

The point to remember is that the design should function under worst case conditions. It's just a pull-up, don't install a value which could hurt the circuit operation, otherwise the pin should have been taken directly to Vcc without the resistor [which always works]. Use the worst case values:
     Vcc: minimum value expected
     VIH: maximum value expected
     RPull-Up: maximum value expected [the value chosen plus the 1% or 5% tolerance variation]
     IIH: maximum value expected {Add each additional pin pulled up by a single resistor [20uA + 20uA for 2 pins pulled up]
If you have a noise budget; [example numbers provided]
Subtract another 0.4v off Vcc minimum to account for ground bounce. [3.1v - 0.4v = 2.7v]
Subtract another 0.1v off Vcc minimum to account for noise on Vcc. [2.7v - 0.1v = 2.6v]

A diode may be used instead of using a resistor for a pull-up. When a diode is used it's called "clamping". The device's input pin is connected to a resistor to ground and two diodes to Vcc. The input pin is then tied [or clamped] to 2 diode drops [1.4v] below Vcc. This method protects the input pin just as the resistor does; however, no one would use this because it requires 3 parts instead of one. So I offer no calculation for the values.

Calculate the minimum load a device can safety drive:
For a low-to-high transition, the equation is;
     ZLH = [(VOH (min) - VOL {typ)) / IOH
For a high-to-low transition, the equation is;
     ZHL = [(VOH (typ) - VOL {max)) / IOH

Slow Rise Time Definition

Bus-Hold IC's
5962-96809; 54LVTH162244; 3.3-volt 16-bit buffer/driver with bus hold and 22 ohm series resistors and three-state outputs, TTL compatible inputs
5962-96810; 54LVTH16373; 3.3-volt 16-bit transparent D-type latch with bus hold, three-state outputs, and TTL compatible inputs
5962-96686; 54LVTH16245A; 3.3-V 16-bit bus transceiver with bus hold, three-state outputs, TTL compatible inputs.
5962-97625; 54ABTH16245; 16-bit bus transceiver with bus hold and three-state outputs, TTL compatible inputs.
5962-96849; 54LVTH16952; 3.3-volt 16-bit registered transceiver, with bus hold, three-state outputs, TTL compatible inputs
5962-95642; 54LVTH245A; 3.3-volt octal bus transceiver with bus hold, three-state outputs, and TTL compatible inputs
5962-97623; 54ABTH245; Octal Bus transceiver with bus hold and 3-state outputs TTL compatible inputs
5962-96748; 54LVTH646; 3.3-volt octal bus transceiver and register with bus hold, three-state outputs, TTL compatible inputs

How to Handle Tri-State Output pins
How to Handle Unused Input pins
How to terminate Open Collector Output pins

Terms -
VCC: The voltage applied to the power pin(s). In most cases the voltage the device needs to operate at.
VIH: [Voltage Input High] The minimum positive voltage applied to the input which will be accepted by the device as a logic high.
VIL: [Voltage Input Low] The maximum positive voltage applied to the input which will be accepted by the device as a logic low.
VOL: [Voltage Output Low] The maximum positive voltage from an output which the device considers will be accepted as the maximum positive low level.
VOH: [Voltage Output High] The maximum positive voltage from an output which the device considers will be accepted as the minimum positive high level.
VT: [Threshold Voltage] The voltage applied to a device which is "transition-Operated", which cause the device to switch. May also be listed as a '+' or '-' value.

Description of TTL, ECL and CMOS Glue Logic Families

Related pages on this site:
. Standard Logic Voltage Thresholds . . Bus Logic Thresholds . . Logic Speed x Power Chart . . Trace Termination . . Ground/Power Planes .

Back to the Logic Design Page.

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Modified: 2/11/12
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