H-Bus



Acquisition H-Bus Description

H-Bus is a dedicated input bus designed for transmitting digital media streams from multiple sources to one acquiring host device".
The H-Bus was developed by MIT, and operates at 640 Mbps.
The H-Bus may have been developed to compete against IEEE-1394 [Firewire], IEEE-1596 [SCI], and Ultra-SCSI.

The H-Bus "consists of between one and eight data-producing, physically separate slave units linked together in a linear topology, with a single bus master at one end of the chain. Data transfers are unidirectional, running downstream from the active slave (the slave which is actively transferring data) to the bus master, and grouped into small (4 Kbit) packets for flow control." H-Bus uses BTL [Backplane Transceiver Logic] interface IC's. The pinout is defined in this proposed Acquisition Bus.
Unsure if H-bus was ever implemented in any products or released as a standard.





No adoption of the H-Bus has been found. So there is no way to know if any company has adopted this interface.
However there does appear to be a vendor that utilized an interface very similar back in the mid 1990's.
Hoontech Co. produced audio gear to connect audio interfaces on their DSP24, DSP2000, and ADC/DAC24 units to a PCI 2.1 card.
The components used 44-pin 3-row-Sub-D connectors over round cables, calling the interface H-Bus.
Up to 8 devices can be connected to a host [unsure of the electrical interface], same as MIT's paper.
There is also a back channel that transfers audio data from the bus master to the devices - here all connected devices get the same data.
Now the H-Bus uses a 50-pin Centronics connector with the same pin out as SCSI-1.
However just under the pinout table from MIT a note indicates some of the grounds may be left out to reduce cost.





H-Bus Centronics Connector PinOut
Pin # Signal names Signal Description Pin # Signal names Signal Description
1 GND Ground 2 GND Ground
3 4
5 6
7 8
9 10
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26 D0 Data Signal
27 D1 Data Signal 28 D2 Data Signal
29 D3 Data Signal 30 D4 Data Signal
31 D5 Data Signal 32 D6 Data Signal
33 D7 Data Signal 34 ACK Arbitration ACK
35 REQ Arbitration REQ 36 GND Ground
37 HV_CLK Data Clock 38 GND Ground
39 D8 Data Signal 40 D9 Data Signal
41 D10 Data Signal 42 D11 Data Signal
43 D12 Data Signal 44 D13 Data Signal
45 D14 Data Signal 46 D15 Data Signal
47 HV_TxD+ Serial + from Master 48 HV_TxD- Serial - from Master
49 HV_RxD+ Serial + from Slaves 50 HV_RxD- Serial - from Slaves

So if all the grounds are not cabled than this 50-pin interface would work on a 44-pin cable.
However I can't tell which grounds were removed by Hoontech, or what was re-pinned.
There was also no indication of the electrical interface, if it was BTL or not.






PC motherboard
Home

Distributor rolodex Electronic Components Electronic Equipment EDA CDROM Software Engineering Standards, BOB card Cabled Computer Bus Electronic Engineering Design Table Conversion DB9-to-DB25.
DistributorsComponents Equipment Software Standards Buses Design Reference

Modified 12/31/11
Copyright © 1998 - 2016 All rights reserved Larry Davis