Dictionary of Technical Terms
"A" "B" "C", "D", "E", "F", "G", "H", "I", "J", "K", "L", "M",
"N", "O", "P", "Q", "R", "S", "T", "U", "V", "W", "X", "Y", "Z"

Logic True Table. A table that describes a logic function by listing all possible combinations of input values and indicating, for each combination, the true output values.


Glue Logic True Tables for the basic IC gates
Logic True Tables

Each of the different logic functions are shown in the graphic above, along with their true table.
Logic gates can be shown in a number of different ways. The Exclusive-OR gate symbols are valid in positive logic; negation may be shown at any two ports. Each of these different XOR gate symbols show exactly the same function. As with all the logic symbols, the circle implies a negation or inversion.

Different ways to represent an XOR gate

Other ICs may also have true tables shown in their data sheets. For example this 7447 IC provides a true table for the Decimal input and 7-segment LED outputs.





The logic true table shown above could be called static true tables, perhaps the logic table below being called a dynamic true table to handle switching conditions.

IC Switching Waveform Logic Table

The top row shows a valid logic condition on a line, either high or low. So the logic gate is stable regardless of the logic level and may be sampled at any time.

The next two rows indicate that the function is switching from high to low or low to high. However the multiply transitions indicate that for some amount of time the output will not be valid and should not be used. Normally the first transition could be considered the minimum propagation time of the component, with the last transition being the maximum propagation time of the logic function. Some timing diagrams might show a few dashed lines to indicate the timing ambiguity while another timing diagram could show a string of these dashed lines to line up with another output in the timing diagram.

The fourth row indicates that the output is unknown and should not be used or sampled. The line may be changing from low to high or high to low. The last line means the output has entered a high impedance state and is not a valid logic level.

Clocked devices such as Flip Flops use a True Table that is relative to the state of the clock, or the changing state of the clock. Some devices may depend on the clock change from low to high or high to low, and is device dependent. In the case of the 7473 [Dual Master-Slave J-K Flip Flop] the clock transition is not mentioned. The true table just refers to a change in the clock level, and does not indicate the direction of change.

 
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