Printed Wiring Board Terms

Technical Engineering Definitions
"A" "B" "C", "D", "E", "F", "G", "H", "I", "J", "K", "L", "M",
"N", "O", "P", "Q", "R", "S", "T", "U", "V", "W", "X", "Y", "Z"

Editor note; All the PWB terms are listed below. The alphabetic links above will switch to the main glossary, so scroll down the page for definitions related to Printed Wiring Boards.

'A' to 'Ge', 'Gr' to 'O', 'P' to 'R', 'S', 'T' to 'Z'

Secondary Side: The back side of the printed wiring board, or the non-primary side. In some cases components are not mounted on the secondary side of the PWB.

Serpentine Routing. A method of routing to match the length of related traces on a PWB.
With two related traces the shorter trace will use Serpentine Routing in order the lengthen the trace so that it then equals the longest of the two traces.

Serpentine Trace Routing is also used for differential traces to insure that both traces are the same length.

Serpentine Traces on a PWB
Serpentine Traces

Silk Screen: The text or graphics embedded on the surface of a PWB using a silk screen-printing process.

Skin Effect: The tendency for alternating current to concentrate in the surface layer of a conductor. The effect increases with frequency and serves to increase the effective resistance of the conductor. Use wider traces to compensate for Skin Effect when using very high speed signals such as RapidIO [SRIO].

SMOBC: Solder Mask Over Bare Copper. Also see Solder Mask.

Solder: A meltable alloy used to produce a bond at the junction of two metal surfaces.

Solderability. The property of a surface that allows it to be wetted by molten solder.

Solder Balls. Very small balls of solder that separate from the main body of solder, which forms the joint and remain adhered to the base laminates. Primarily caused by oxides in the solder paste that inhibit solder fusion during reflow.

Solder Bridge. A build up of solder between adjacent metal pads or component leads on a print wiring board, which should other wise not be connected.

Solder, Fillet. A blended or meniscoid (rounded) configuration of solder around a part or wire lead and land.

Solder Mask: Coating material used to mask or protect selected areas of a pattern from the action of an etchant, solder, or plating. Solder Mask prevents flowing and bridging between adjacent conductors.

Solder Paste. A homogeneous combination of minute spherical solder particles, flux, solvent, and a gelling suspension agent, which is used in the surface mount reflow soldering process. Solder paste can be deposited onto a PWB via screen or stencil or via manual or automated dispensing systems.

Solder-Short: A defect that occurs when solder forms an unintended junction between two metal surfaces causing a short circuit.

Solder Side. The secondary side of a printed wiring board, which is typically exposed to the application of solder during a mass soldering process (i.e. solder wave or solder fountain).

Spacing: [Trace] There are a number of different spacing requirements. Use the design guidelines on the right side of the page, an example below.
-- 7 mil Spacing differential spacing trace to trace.
-- 20 mil Spacing differential pair-to-pair spacing.

Split Plane. A power or ground plane that contains more than one voltage references. Example a 5 volt power plane that also contains a 3.3 volt island, or a ground plane that contains both digital ground and analog ground. Care should be taken when routing over split planes with traces on adjunct layers that use one of the planes as reference.

Split Voltage Plane on a PWB
Split Reference Plane

Stacking. The primary purpose for adhesive bonding/staking is to protect and support components and parts that may be damaged by vibration, shock or handling. Bonding/staking material may either by resilient or rigid.

Stackup. The function and requirements of each layer in a multi-layer PCB. In general the stackup may indicate which layers are ground planes or power planes, which layer requires a particular trace impedance what the purpose of the layer is used for, the thickness of the copper on each layer and so on. The stack-up consists of outer layers of copper, and internal layers of core material separated by prepreg.

Stand-Off: [Spacer] A component used to raise a device off the PCB. In most cases the spacer also provides mechanical stability to the component, and allows for heat separation form the PWB.

Transistor Spacer
Transistor Spacer

MIL Spec note on; Mounting standoffs. IC Socket bodies intended to be soldered to a printed circuit board shall be provided with mounting bosses so that a minimum of .012 inch (0.30 mm) clearance is maintained between the mounting board and the socket body at each terminal location.

Stitching Capacitor. A stitching capacitor is used when a critical signal transitions between reference planes. The stitching capacitor is then connected between the two planes [Vcc and Ground] near the critical trace effectively tying the two planes together. Under normally circumstances critical nets should not change reference planes, but in some cases this can not be avoided. The recommendation is that a low value bypass capacitor between the planes be used as close as possible for decoupling [0.1uF].

Stitching Via: A via used to stitch one layer to another. Commonly used to insure good connection between a ground island on one layer with the ground plane on another layer, also refer to Ground Stitching above. Or provide a good connection between a power island and power plane. Stitching vias are also used to provide a ground reference as signals pass between layers, a ground via may be placed next to a signal net as it passes from one layer to another.

Stripline: Traces routed in inner layers and have two reference planes. In a Printed Circuit Board [PCB] stack-up, striplines are on internal layers. Related definition Microstrip.

Stripline Topology
Stripline Traces

Stub. Short section of a circuit trace. A split off the main transmission line that does not lead to the line termination.

Substrate: Mounting surface for integrated circuits. May be semiconductor or insulator material depending on type of IC.

Subsurface imperfections: Fabrication faults on the inside layers of a PWB. Subsurface imperfections (such as blistering, haloing, and delamination) shall be acceptable providing the imperfection meets the following:
a. The imperfection is translucent.
b. The imperfection does not bridge more than 25 percent of the distance between conductors or plated-through holes. No more than two percent of the printed wiring board area on each side shall be affected.
c. The imperfection does not reduce conductor spacing below the minimum requirements specified.
d. The imperfection does not propagate as a result of testing (such as rework simulation, thermal stress, or thermal shock).

Surface Imperfections. Fabrication faults on the top or bottom of a PWB. Surface imperfections (such as scratches, pits, dents, cuts or exposed reinforcement material fibers and weave texture) shall be acceptable providing the imperfection meets the following:
a. The imperfection does not bridge between conductors (weave texture may bridge conductors).
b. The dielectric spacing between the imperfection and conductors is not reduced below the specified minimum requirements.

Surface Mounting. A method of assembling PWBs (or hybrid circuits) where parts are mounted onto, rather than into, the substrate. Surface mount attachment can be achieved either through reflow soldering (where the part is soldered upright) or through dual wave soldering, where the parts are initially attached with epoxy and soldered upside down. This term also refers to the electrical and mechanical connection of a part to the surface of a conductive pattern that does not utilize part lead holes.

Surface Mount Device: [SMD]. A component that does not use leads that penetrate the Printed Wiring Board. Some common SMD Sizes for resistors and capacitors are shown. Surface mount components are available in a number of different common packages depending of permissible power dissipation.

SMD, Surface Mount Components
Surface Mount Devices

PWB Design Recommendations;
a. Design for Cost; which comes into play as more boards are being produced. If only a single panel is being developed it may be cheaper to just add more layers to speed up the layout process, reducing engineering time. Adding a few more layers may greatly reduce the layout process while only slightly increasing the cost of the few panels needed. Of course, as more boards are produced greater detail needs to be applied to cost.
b. Blind vias will increase the expensive of fabrication.
c. A standard thickness of an embedded board [cPCI, VME] is .062".
The standard thickness of a backplane is 0.125"

PC motherboard

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