PXI Connector P2 Pin Out and Signal names

The PXI connector P2 [J2] pinout is provided below for the Peripheral slot, up to seven slots are defined.
The PXI P2 connector pinout for the System slot is provided on its own page.
The pinout is also the same as the CompactPCI pinout. cPCI is electrically identical to the PCI specification, it uses the same signals.
However some signals have been added in addition to the PCI specification. The P2 connector carriers the 64-bit PCI pins.
Refer to the PXI P1 pinout page for P1/J1 Pin outs, which are the same between peripheral slots and system slots.
The J1 assignment is used on the card side, while P1 would be the backplane section of the mating connector.

Editor note; signal assignments are normally fixed for the life of the standard, regardless of the revision level.

**PXI P2 Connector Pin Out; Peripheral Slot**
Pin	Signal name
--	Row Z	Row A	Row B	Row C	Row D	Row E	Row F
22	GND	PXI_RSVA22	PXI_RSVB22	PXI_RSVC22	PXI_RSVD22	PXI_RSVE22	GND
21		PXI_LBR0	GND	PXI_LBR1	PXI_LBR2	PXI_LBR3
20		PXI_LBR4	PXI_LBR5	PXI_LBL0	GND	PXI_LBL1
19		PXI_LBL2	GND	PXI_LBL3	PXI_LBL4	PXI_LBL5
18		PXI_TRIG3	PXI_TRIG4	PXI_TRIG5	GND	PXI_TRIG6
17		PXI_TRIG2	GND	PRST#	PXI_STAR	PXI_CLK10
16		PXI_TRIG1	PXI_TRIG0	DEG#	GND	PXI_TRIG7
15		PXI_BRSVA15	GND	FAL#	PXI_LBL6	PXI_LBR6
14		AD[35]	AD[34]	AD[33]	GND	AD[32]
13		AD[38]	GND	V(I/O)	AD[37]	AD[36]
12		AD[42]	AD[41]	AD[40]	GND	AD[39]
11		AD[45]	GND	V(I/O)	AD[44]	AD[43]
10		AD[49]	AD[48]	AD[47]	GND	AD[46]
9		AD[52]	GND	V(I/O)	AD[51]	AD[50]
8		AD[56]	AD[55]	AD[54]	GND	AD[53]
7		AD[59]	GND	V(I/O)	AD[58]	AD[57]
6		AD[63]	AD[62]	AD[61]	GND	AD[60]
5		C/BE[5]#	GND	V(I/O)	C/BE[4]#	PAR64
4		V(I/O)	PXI_BRSVB4	C/BE[7]#	GND	C/BE[6]#
3		PXI_LBR7	GND	PXI_LBR8	PXI_LBR9	PXI_LBR10
2		PXI_LBR11	PXI_LBR12	SYSEN#	PXI_LBL7	PXI_LBL8
1		PXI_LBL9	GND	PXI_LBL10	PXI_LBL11	PXI_LBL12

The PXI Peripheral Slot pin out for P2/J2 is provided above. cPCI is electrically identical to the PCI specification, it uses the same signals. However some signals have been added in addition to the ones used in the PCI specification.
In other words this connector carries PCI signals, cPCI signals and signals defined by PXI.

Additional signal assignment notes:
The number sign in the pinout table above refers to: "A # symbol at the end of a signal name indicates that the signals asserted state occurs when it is at a low voltage. The absence of a # symbol indicates that the signal is asserted at a high voltage.
The V(I/O) pins are un-named in this table. In a +5 volt system the V(I/O) pins are +5volts, in a +3.3 volt system the V(I/O) pins are +3.3 volts.
Power requirements are different between peripheral slots and systems slots.

cPCI uses 2mm 'Hard Metric'; IEC 1076-4-101, a number of different pin arrangements. Normally the outside Ground rows (which are compression pins) 'Z' and 'F' are not counted as pins. OEM pin numbering may be by cPCI or in accordance with IEC 61076-4-101 (which is reversed). The term "Hard Metric" only means that metric dimensions are preferred ~ with-out regard to inches.

cPCI 2mm connectors mating distances [12.50mm] matches the 96 pin DIN 41612 connectors used with other EuroCard packaging [IEC 273 or IEEE 1101, 1101.10], like VMEbus. FutureBus connectors, which also use 2mm style has a mating distance of 10mm, and is not compatible with cPCI connectors.

The connector styles below are counting signal pins (not the ground rows), as indicated on many data sheets:

Type A connector; 110 pins, Keyed (J1/J4),([25 rows x 5 columns] - [3 rows x 5 columns of Key])
Type B connector; 110 pins (J2/J5), [22 x 5]
Type B connector; 95 pins (J3), [19 x 5]. This is also used as P0 with VME64
Type C connector; 55 pins [11 x 5]
Type AB; 95, 110, or 125 pins

There are other types:
Type L connector; # contact cavities to accept power insert contacts
Type M connector; # contact cavities to accept power insert contacts/with half the connector having normal pins

Return to the main PXI Compact PCI [cPCI] for Instrumentation Bus page, which contain a description of the bus, connector manufacturer, and IC manufacturer links.

Site Navigation: Engineering Home > Electrical Buses > Backplane Buses > PXI Bus > Peripheral I/O.


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