PXI Bus P1 Connector Pinout and Signal Names

The PXI connector P1 [J1] System slot pinout is provided below.
The pinout is also the same as the CompactPCI pinout.
cPCI is electrically identical to the PCI specification, it uses the same signals.
However some signals have been added in addition to the PCI specification.
Refer to the PXI P2 pinout page for P2/J2 Pin outs.

**PXI P1 Connector Signal Assignments**
Pin #	Signal Name	Signal Name	Signal Name	Signal Name	Signal Name	Signal Name	Signal Name
--	Row Z	Row A	Row B	Row C	Row D	Row E	Row F
25	GND	5V	REQ64#	ENUM#	3.3V	5V	GND
24	GND	AD[1]	5V	V(I/O)	AD[0]	ACK64#	GND
23	GND	3.3V	AD[4]	AD[3]	5V	AD[2]	GND
22	GND	AD[7]	GND	3.3V	AD[6]	AD[5]	GND
21	GND	3.3V	AD[9]	AD[8]	M66EN	C/BE[0]#	GND
20	GND	AD[12]	GND	V(I/O)	AD[11]	AD[10]	GND
19	GND	3.3V	AD[15]	AD[14]	GND	AD[13]	GND
18	GND	SERR#	GND	3.3V	PAR	C/BE[1]#	GND
17	GND	3.3V	SDONE	SBO#	GND	PERR#	GND
16	GND	DEV SEL#	GND	V(I/O)	STOP#	LOCK#	GND
15	GND	3.3V	FRAME#	IRDY#	GND	TRDY#	GND
14	KEY	KEY	KEY	KEY	KEY	KEY	KEY
13	KEY	KEY	KEY	KEY	KEY	KEY	KEY
12	KEY	KEY	KEY	KEY	KEY	KEY	KEY
11	GND	AD[18]	AD[17]	AD[16]	GND	C/BE[2]#	GND
10	GND	AD[21]	GND	3.3V	AD[20]	AD[19]	GND
9	GND	C/BE[3]#	IDSEL	AD[23]	GND	AD[22]	GND
8	GND	AD[26]	GND	V(I/O)	AD[25]	AD[24]	GND
7	GND	AD[30]	AD[29]	AD[28]	GND	AD[27]	GND
6	GND	REQ#	GND	3.3V	CLK	AD[31]	GND
5	GND	BRSVP1A5	BRSVP1B5	RST#	GND	GNT#	GND
4	GND	BRSVP1A4	GND	V{I/O)	INTP	INTS	GND
3	GND	INTA#	INTB#	INTC#	5V	INTD#	GND
2	GND	TCK	5V	TMS	TDO	TDI	GND
1	GND	5V	-12V	TRST#	+12V	5V	GND

Additional PXI notes:

PXI stands for Compact PCI for Instrumentation Bus
The number sign in the pinout table above refers to: "A # symbol at the end of a signal name indicates that the signals asserted state occurs when it is at a low voltage. The absence of a # symbol indicates that the signal is asserted at a high voltage.
The pin descriptions which indicate a Key is not a pin, but a male or female void [key].
The V(I/O) pins are un-named in this table. In a +5 volt system the V(I/O) pins are +5volts, in a +3.3volt system the V(I/O) pins are +3.3 volts.

PXI [and cPCI] uses 2mm 'Hard Metric'; IEC 1076-4-101, a number of different pin arrangements. Normally the outside Ground rows (which are compression pins) 'Z' and 'F' are not counted as pins. OEM pin numbering may be by cPCI or in accordance with IEC 61076-4-101 (which is reversed). The term "Hard Metric" only means that metric dimensions are preferred ~ with-out regard to inches.

PXI [and cPCI] 2mm connectors mating distances [12.50mm] matches the 96 pin DIN 41612 connectors used with other EuroCard packaging [IEC 273 or IEEE 1101, 1101.10], like VME. FutureBus connectors, which also use 2mm style has a mating distance of 10mm, and is not compatible with cPCI connectors.

The connector types below are counting signal pins (not the ground rows), as indicated on many data sheets:

Type A connector; 110 pins, Keyed (J1/J4),([25 rows x 5 columns] - [3 rows x 5 columns of Key])
Type B connector; 110 pins (J2/J5), [22 x 5]
Type B connector; 95 pins (J3), [19 x 5]. This is also used as P0 with VME64
Type C connector; 55 pins [11 x 5]
Type AB connector; 95, 110, or 125 pins

There are other stlyes:
Type L connector; # contact cavities to accept power insert contacts
Type M connector; # contact cavities to accept power insert contacts/with half the connector having normal pins

The main PXI Compact PCI [cPCI] for Instrumentation Bus page, which contain a description of the bus, connector manufacturer, and IC manufacturer links.
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Design Key words: PXI, Instrumentation, CompactPCI, Compact Peripheral Component Interface, cPCI, cPCI Pinouts, P1/J1 Pinouts, Pin Outs, 2mm Connector,
Signal Names, 5row, Description Embedded Parallel Computer Bus, Signals, Pin Number, Assignment, Specification, Standard, Defined, Constraint, Properties, Lines, Data, Labels


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