The PCI-Express bus supports 1x [2.5Gbps],
2x, 4x, 8x, 12x, 16x, and 32x bus widths [transmit / receive pairs].
The PCI-Express [PCIe] 16x signal names and pinout are listed in the table
below.
The 16x wide PCI Express bus is used as the video expansion slot on PC motherboards, replacing the older and
slower AGP video slot.
The pinout table below provides 16 transmit pairs and 16 receive signal pairs
[signals are differential] for a signal through-put of 5GBps.
Pinout
tables for the other PCI Express widths are listed below the table.
Pin | Side B Connector | Side A Connector | ||
# | name | Description | name | Description |
1 | +12v | +12 volt power | PRSNT#1 | Hot plug presence detect |
2 | +12v | +12 volt power | +12v | +12 volt power |
3 | +12v | +12 volt power | +12v | +12 volt power |
4 | GND | Ground | GND | Ground |
5 | SMCLK | SMBus clock | JTAG2 | TCK |
6 | SMDAT | SMBus data | JTAG3 | TDI |
7 | GND | Ground | JTAG4 | TDO |
8 | +3.3v | +3.3 volt power | JTAG5 | TMS |
9 | JTAG1 | +TRST# | +3.3v | +3.3 volt power |
10 | 3.3Vaux | 3.3v volt power | +3.3v | +3.3 volt power |
11 | WAKE# | Link Reactivation | PWRGD | Power Good |
|
||||
12 | RSVD | Reserved | GND | Ground |
13 | GND | Ground | REFCLK+ |
Reference Clock Differential pair |
14 | HSOp(0) |
Transmitter Lane 0, Differential pair |
REFCLK- | |
15 | HSOn(0) | GND | Ground | |
16 | GND | Ground | HSIp(0) |
Receiver Lane 0, Differential pair |
17 | PRSNT#2 | Hotplug detect | HSIn(0) | |
18 | GND | Ground | GND | Ground |
19 | HSOp(1) |
Transmitter Lane 1, Differential pair |
RSVD | Reserved |
20 | HSOn(1) | GND | Ground | |
21 | GND | Ground | HSIp(1) |
Receiver Lane 1, Differential pair |
22 | GND | Ground | HSIn(1) | |
23 | HSOp(2) |
Transmitter Lane 2, Differential pair |
GND | Ground |
24 | HSOn(2) | GND | Ground | |
25 | GND | Ground | HSIp(2) |
Receiver Lane 2, Differential pair |
26 | GND | Ground | HSIn(2) | |
27 | HSOp(3) |
Transmitter Lane 3, Differential pair |
GND | Ground |
28 | HSOn(3) | GND | Ground | |
29 | GND | Ground | HSIp(3) |
Receiver Lane 3, Differential pair |
30 | RSVD | Reserved | HSIn(3) | |
31 | PRSNT#2 | Hot plug detect | GND | Ground |
32 | GND | Ground | RSVD | Reserved |
33 | HSOp(4) | Transmitter Lane 4, Differential pair |
RSVD | Reserved |
34 | HSOn(4) | GND | Ground | |
35 | GND | Ground | HSIp(4) | Receiver Lane 4, Differential pair |
36 | GND | Ground | HSIn(4) | |
37 | HSOp(5) | Transmitter Lane 5, Differential pair |
GND | Ground |
38 | HSOn(5) | GND | Ground | |
39 | GND | Ground | HSIp(5) | Receiver Lane 5, Differential pair |
40 | GND | Ground | HSIn(5) | |
41 | HSOp(6) | Transmitter Lane 6, Differential pair |
GND | Ground |
42 | HSOn(6) | GND | Ground | |
43 | GND | Ground | HSIp(6) | Receiver Lane 6, Differential pair |
44 | GND | Ground | HSIn(6) | |
45 | HSOp(7) | Transmitter Lane 7, Differential pair |
GND | Ground |
46 | HSOn(7) | GND | Ground | |
47 | GND | Ground | HSIp(7) |
Receiver Lane 7, Differential pair |
48 | PRSNT#2 | Hot plug detect | HSIn(7) | |
49 | GND | Ground | GND | Ground |
50 | HSOp(8) | Transmitter Lane 8, Differential pair |
RSVD | Reserved |
51 | HSOn(8) | GND | Ground | |
52 | GND | Ground | HSIp(8) | Receiver Lane 8, Differential pair |
53 | GND | Ground | HSIn(8) | |
54 | HSOp(9) | Transmitter Lane 9, Differential pair |
GND | Ground |
55 | HSOn(9) | GND | Ground | |
56 | GND | Ground | HSIp(9) | Receiver Lane 9, Differential pair |
57 | GND | Ground | HSIn(9) | |
58 | HSOp(10) | Transmitter Lane 10, Differential pair |
GND | Ground |
59 | HSOn(10) | GND | Ground | |
60 | GND | Ground | HSIp(10) | Receiver Lane 10, Differential pair |
61 | GND | Ground | HSIn(10) | |
62 | HSOp(11) | Transmitter Lane 11, Differential pair |
GND | Ground |
63 | HSOn(11) | GND | Ground | |
64 | GND | Ground | HSIp(11) | Receiver Lane 11, Differential pair |
65 | GND | Ground | HSIn(11) | |
66 | HSOp(12) | Transmitter Lane 12, Differential pair |
GND | Ground |
67 | HSOn(12) | GND | Ground | |
68 | GND | Ground | HSIp(12) | Receiver Lane 12, Differential pair |
69 | GND | Ground | HSIn(12) | |
70 | HSOp(13) | Transmitter Lane 13, Differential pair |
GND | Ground |
71 | HSOn(13) | GND | Ground | |
72 | GND | Ground | HSIp(13) | Receiver Lane 13, Differential pair |
73 | GND | Ground | HSIn(13) | |
74 | HSOp(14) | Transmitter Lane 14, Differential pair |
GND | Ground |
75 | HSOn(14) | GND | Ground | |
76 | GND | Ground | HSIp(14) | Receiver Lane 14, Differential pair |
77 | GND | Ground | HSIn(14) | |
78 | HSOp(15) | Transmitter Lane 15, Differential pair |
GND | Ground |
79 | HSOn(15) | GND | Ground | |
80 | GND | Ground | HSIp(15) | Receiver Lane 15, Differential pair |
81 | PRSNT#2 | Hot plug present detect | HSIn(15) | |
82 | RSVD#2 | Hot Plug Detect | GND | Ground |
PCI Express is the new serial bus addition to the PCI series of
specifications. This is a serial bus which uses two low-voltage
differential LVDS pairs, at 2.5Gb/s in each direction
[one transmit, and one receive pair]. PCI Express uses 8B/10B
encoding [each 8 bit byte is translated into a 10 bit character in order
to equalize the numbers of 1's and 0's sent, and the encoded signal
contains an embedded clock]. PCI Express supports 1x [2.5Gbps], 2x, 4x,
8x, 12x, 16x, and 32x bus widths [transmit / receive pairs]. The
PCI-Express [PCIe] 16x signal names and pinout are listed above.
The differential pins [Lanes] listed in the pin out table above are
LVDS which stands for: Low Voltage Differential Signaling. The
Electrical layer of LVDS is described on the LVDS bus page. The
function of the JTAG pins listed
above are described on the JTAG bus page.
The function of the SMbus pins are described on the
SMbus page.
PCI-Express 1x Connector Pinout and
1x signal names.
PCI-Express 4x Connector Pinout and
4x signal names.
PCI-Express 8x Connector Pinout and
8x signal names.
The main PCI-Express bus [PCIe] page.
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