RapidIO Bus Description, and IC Manufacturers Links

RapidIO Bus

RapidIO Bus Description

RapidIO defines a high-performance, packet-switched [276 bytes], interconnect technology designed for passing data and control information between microprocessors, DSPs, communication and network processors, system memory, and peripheral devices.

RapidIO may be used as a chip-to-chip and board-to-board communications bus. RapidIO may be found as a bus on a single PC card or used as a back plane interconnect bus. RapidIO uses a full duplex interface with either an 8-bit or 16-bit [unidirectional] Input and Output @ 10Gbps, using LVDS [Low Voltage Differential Signaling]. RapidIO payloads are double-word 8-byte aligned big-endian. RapidIO uses a 16-bit CRC. X¹⁶+ X¹²+ X⁵+1. Device drivers are Source Terminated, device receivers require a differentially termination 100 ohm resistor.

RapidFabric is an extension to RapidIO. RapidFabric adds a serial physical layer, flow control, multicast, protocol encapsulation/internetworking and high-end traffic-management capabilities. The RapidFabric extensions may be fully backward compatible with the RapidIO interface [depending on the extensions used].

RapidIO Bus Standards

RapidIO Trade Association

RapidIO Bus Interface IC Vendors

Uses LVDS [Low Voltage Differential Signaling] EIA-644 description page.

Altera {FPGA Physical Interfaces, RapidIO IP Cores}

Avago Technologies {8-port, 4x switch fabric IC}

Freescale Semiconductor, Inc. {MPC8540 RapidIO - Enabled Processor IC Manufacturer}

Lattice {RapidIO IP (Serial RapidIO core, physical layer specification}

LSI Corporation {RapidIO IP (Intellectual Property) ASIC Solution}

Mercury Computer Systems, Inc. {RapidIO IP (Intellectual Property) Core, Serial RapidIO 8-Port Switch IC}

micro Memory {RapidIO IP (Intellectual Property) Core, Serial RapidIO 8-Port Switch IC}

Praesum Communications Inc. {RapidIO IP (Intellectual Property) LVDS Physical Layer, Serial Physical Layer}

Tundra Semiconductor Corporation {RapidIO PCI/X Bridge ICs - RapidIO Switches}

Xilinx {Virtex FPGA Core, RapidIO Physical Layer Interface}

LVDS [IEEE-644] Interface level

Electronic Engineering Design Key words: RapidIO Bus, LVDS, RS-644, IEEE644, Low Voltage Differential Signaling, Electrical layer, Multi-Drop, Standard, differential Balanced interface, Interface Standard Data Bus, Standard, Specification, Spec, Interface, IC, Physical Interface, Description, Personal Computer, PC, Local Bus


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Last Modified: 2/12/08