The Personal Computer [PC] Parallel Port Connector Pin-Out for the
Centronics Standard Parallel Port [SPP] is listed below.
Normally the parallel port is indicated by the term LPT which did stand for line printer terminal, but now simply refers to the parallel port.
The Centronics parallel cable has a maximum run out to 12 feet, using a 36-pin champ connector at the printer and a 25-pin D-Sub connector on the Host [PC] side. The pinout for the 25-pin D-Sub connector is shown below. The IEEE-1284 Bus cable which replaced this bus has a maximum run out to 25 feet. The function and pin out between the two buses differ. The Centronics interface is an 8-bit [parallel] unidirectional bus. The 36-pin centronics Champ connector pinout used on the printer is listed on the Centronics Connector PinOut page. There is no defined standard for the Centronics interface, timing varied between printers from different manufacturers, as did drivers, receivers and termination values. The maximum possible transfer rate is 150kbps, but typical values were 10kbps. The electrical interface used TTL logic levels. The data lines used 74LS374 FF ICs, while the control lines used 7405 ICs.
Resistor pull-ups for the open collector lines were 4.7k ohm to +5 volts, but could be any value because there was no specification. However the pull-ups still had to be in a range that would allow the IC circuits to function.
The IBM PS/2 series of computer [also obsolete] added bi-direction to the
The Centronics [Printer side] and original Parallel port [Computer side] interfaces are obsolete, replaced by the IEEE-1284 Bus.
The Original IBM PC Parallel Port Pin-Out [defined as the 'A' connector by IEEE1284], was replaced by the IEEE-1284 cable [25 Pin D-Sub] in 1994.
The IEEE-1284 'A' cable is backwards compatible with the IBM Personal Computer [PC] Parallel Port cable and has the same pinout listed here.
The IEEE-1284 'A' cable is defined in the standard and is a better made cable, while the original parallel port cable had no specification.
|Pin #||Pin name||Pin Description and Function|
|2||D0||Data Bit 0|
|3||D1||Data Bit 1|
|4||D2||Data Bit 2|
|5||D3||Data Bit 3|
|6||D4||Data Bit 4|
|7||D5||Data Bit 5|
|8||D6||Data Bit 6|
|9||D7||Data Bit 7|
|19||GND||Data bit 1 and 2 Ground|
|20||GND||Data bit 3 and 4 Ground|
|21||GND||Data bit 5 and 6 Ground|
|22||GND||Data bit 7 and 8 Ground|
|23||GND||Busy and Fault Ground|
|24||GND||Paper out, Select, and Acknowledge Ground|
|25||GND||AutoFeed, Select input and Initialize Ground|
The cable side of the 25-pin D is the Jack, with male pins.
The PC side of the connector is the Plug, with female sockets.
25 pin Dsub Pin Numbering
Timing for the SSP interface is shown below. The transfer starts when the
Printer is ready for data and brings BUSY low.
The Host then places data on the bus and waits 500nS [minimum] before taking the Strobe active [low].
The Strobe is active for 500nS minimum. The Host leaves valid data on the bus for another 500nS after the Strobe is removed.
Once the printer receives the data it takes the Busy line active to indicate data is being processed.
When the printer has finished with the data it will activate the ACK line for a minimum of 500nS, and then de-assert the BUSY line.
Back to the main IEEE-1284 bus page.
Centronics Connector Pinout .... 1284-A Cable Pinout .... 1284-B Cable Pinout .... 1284-C Cable Pinout
This style LPT port was replaced in 1994, so giving the PC vendors another 3 or 4 years to add the newer interface would mean that by the year 2000 there should not be a computer being produced with this interface. Unlike some other electrical buses the replacement was backward compatible, so there would be no reason for a PC vendor to hold on to the older interface. In other words the Parallel Port should not exist on a PC produced over the last ten years.
Design Warning: This pages covers an obsolete interface used on personal computers and is no longer in operation with PCs currently in production. The data provided here should not be used in new designs unless that circuit needs to interface with a legacy system, or a system that still uses this interface for communication. In addition if this interface were required the ICs referenced here may be end-of-life and may require a life-time buy or designed out with a glue logic family currently in mass production.