HIPPI ECL Interface Circuit
The HIPPI specification defines the mechanical, electrical and
signalling protocol for a high performance simplex interface [data
transmits in one direction only]. An additional HIPPI interface is
required to transmit data in a full-duplex mode.
Parallel HIPPI operates bi-directionally (point to point) at 100 MBps
[HIPPI-800] or with a throughput of 200 MBps [HIPPI-1600], up to 25
meters, using copper cabling [wire]. Serial HIPPI will run at 100
MBps [HIPPI-800 Serial], or 200 MBps [HIPPI-1600 Serial] using
coaxial cable for distances up to 25 meter, and fiber optic cabling
for distances up to 1K meter (Multi Mode) or 10K meters (Single Mode)
HIPPI-6400 will run at 1.6Gbps [1.2 Gbaud rate]. The term HIPPI-800
means 800M bits per sec or 100M Bytes per sec, HIPPI-1600 refers to
1600 Bits per sec or 200M Bytes per sec. The HIPPI specification
defines the physical layer and is used with LAN [Local Area
Networks]. The data bus consists of either 32 bit data lines [D00 to
D31] or 64 bit lines [D00 to D63].
Parallel HIPPI (HIPPI-PH) [PH is Physical] uses two 100 pin shielded
twisted pair (STP) cables [50 twisted pairs, 28AWG wire], using differential ECL [copper wire
interface]. Of course by definition all Emitter Coupled Logic [ECL]
devices require Trace Termination. The Drain wire is also
28AWG, and the Braid shield wire is
36AWG. The HIPPI cables are grounded at both
ends via the cable shield and connector shell bond. The pin out is
defined in the HIPPI-PH Specification.
HIPPI-6400 is also termed Super-HIPPI, and may also be produced under
the commercial name of Gigabyte System Network 'GSN'.
A HIPPI-PH channel transmits data in one direction [simplex
interface], two channels are required for full-duplex operation.
The HIPPI interface is a point-to-point bus that does not support
multi-drop operation. Data runs in bursts, each burst contains
between 1 and 256 words.
ANSI X3.183-1991: High-Performance Parallel Interface -
Mechanical, Electrical, and Signaling Protocol Specification
(HIPPI-PH)
ANSI X3.210-1992: High-Performance Parallel Interface - Framing
Protocol (HIPPI-FP)
ANSI X3.218-1993: High-Performance Parallel Interface -
Encapsulation of ISO 8802-2 (IEEE Std 802.2), Logical Link Protocol
Specification (HIPPI-LE)
ANSI X3.222-1993: High-Performance Parallel Interface - Physical
Switch Control Specification (HIPPI-SC)
ANSI X3.283-1995: Encapsulation of Frames of the Fibre Channel
Physical and Signalling Interface (HIPPI-FC)
HIPPI Working Documents, www.hippi.org/cDOCS.html {not active}
Also try the Technical Committee T11 [www.t11.org] for HIPPI information
Also refer to the Fiber Channel page.
HIPPI uses Differential ECL ICs. A listing of ECL [Emitter Coupled
Logic] Manufacturers may be found on the;
ECL Standard Logic page, or for
all other IC Manufacturers, or select the components icon below.
All HIPPI lines are Differential ECL as shown in the graphic above. Of
course the nominal voltage levels over the HIPPI interface are normal ECL voltage levels.
Each differential signal is transmitted over a twisted-pair conductor. The far
end termination is 110 ohm resistor [+/- 2%] as shown in the graphic.
The cable impedance is 108 ohms
Editor note; I'm not sure what usage HIPPI gets within the industry at this point.
The last specification shown above dates back to 1996.
However after you give a few years to get products released, and a few more years for them to be adopted, HIPPI might not be that old.
Although when a standard isn't updated after some number of years it may give an indication that interest has dropped.
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Modified 6/13/15
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