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The HIPPI specification defines the mechanical, electrical and
signalling protocol for a high performance simplex interface [data
transmits in one direction only]. An additional HIPPI interface is
required to transmit data in a full-duplex mode. |
ANSI X3.183-1991: High-Performance Parallel Interface -
Mechanical, Electrical, and Signaling Protocol Specification
(HIPPI-PH)
ANSI X3.210-1992: High-Performance Parallel Interface - Framing
Protocol (HIPPI-FP)
ANSI X3.218-1993: High-Performance Parallel Interface -
Encapsulation of ISO 8802-2 (IEEE Std 802.2), Logical Link Protocol
Specification (HIPPI-LE)
ANSI X3.222-1993: High-Performance Parallel Interface - Physical
Switch Control Specification (HIPPI-SC)
ANSI X3.283-1995: Encapsulation of Frames of the Fibre Channel
Physical and Signalling Interface (HIPPI-FC)
HIPPI Working Documents, www.hippi.org/cDOCS.html {HIPPI.org}
HIPPI Info {Technical Committee T11}
Fiber Channel page
HIPPI uses Differential ECL ICs. A listing of ECL [Emitter Coupled
Logic] Manufacturers may be found on the;
ECL Standard Logic page, or for
all other IC Manufacturers, or select the components icon below.

All HIPPI lines are Differential ECL as shown in the graphic above. Of
course the nominal voltage levels over the HIPPI interface are normal ECL
voltage levels.
Each
differential signal is transmitted over a twisted-pair conductor. The far
end termination is 110 ohm resistor [+/- 2%] as shown in the graphic.
The cable impedance is 108 ohms
Electronic Design Key words: HIPPI, High-Performance Parallel
Interface, Peripheral HPPI Bus, SuperHIPPI, Physical, Mechanical,
HIPPI-PH, Type, Description,
Brief, ICs, Integrated Circuits, Vendors,
Products, Manufacturers, specification, Bus pin out, Cable, Differential
ECL, Emitter Coupled Logic, physical layer, Signalling Protocol
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Last Modified 11/24/09
Copyright © 1998 - 2010 All rights reserved Leroy Davis