Access Bus

[Access Bus Description] [I2C Description]

Access Bus Description

Access.Bus is a low speed serial bus aimed at the PC (serial bus) market. Access.Bus uses the I2C bus as the electrical hardware interface but defines it's own physical interface. Access.Bus also defines a communication protocol, and device driver information for each of the common interfaces listed. A four pin modular type connector and a shielded 4 wire cable is called out in the specification. ACCESS.bus operates at 100 Kbps with a maximum cable length is 10 meters, however a repeater may be added to increase the bus length. Access.Bus uses the same signals as the I2C bus, and adds ground and power. ACCESS.bus may be used On-Board [as a PWB trace] to control a Smart Battery, Smart Clock, or Audio function, or Off-Board to interface to the Monitor, Keyboard or Mouse. The specification is controlled by the ACCESS.bus Industry Group (ABIG).

Off-Board Access.bus uses a 4-pin modular connector. The connector maybe keyed. The cable is shielded and has 4 conductors.
A maximum of 1000pF capacitance should be seen on the bus.

Access.Bus Pinout
Pin 1: GND, Black(#26AWG) [AWG: American Wire Gage]
Pin 2: SDA [Send Data], Green (#28AWG)
Pin 3: +5v, Red (#26AWG)
Pin 4: SCL [Serial Clock], White (#28AWG)
Shield: Connected only to the host connector shield and host ground

The Access.Bus specification [see below] also calls out pull-up [RP] resistor of 820 Ohms minimum and 51 ohm [maximum] serial resistors located on the host. The pull-up resistor provides an IOL of 6mA, while the series resistor provides ESD protection.
Optional clamping diodes may be used for ESD protection between Vcc and Ground

The Off-Board host supplies between +4.75v and 5.25v, with a power-on rise time of 100mS. The supply voltage may not be used by all devices connected to the bus. The host must supply between 50mA and 1 amp of current.
Each device connected to the bus requires a 10uF capacitor placed between Vcc and Ground.

The last specification that was released was Version 3, 1995. I do not believe this bus is used in modern Personal Computers

AccessBus Protocol Specification {Micro Computer Control Corp.}

I2C Bus Description

I2C bus [Inter-IC Bus] or [IIC Bus] was originally designed to be a battery control interface. The I2C bus uses a bi-directional Serial Clock Line [SCL] and Serial Data Lines [SDA]. Both lines are pulled high via a resistor [Rp]. Resistor Rs is optional, and used for ESD protection for 'Hot-Swap' devices. No other lines are specified. Three speed modes are specified: Standard; 100kbps [Bits per Second], Fast mode; 400kbps, High speed mode 3.4Mbps. I2C, due to its two-wire nature (one clock, one data) can only communicate half-duplex. The maximum bus capacitance is 400pF, which sets the maximum number of devices on the bus and the maximum line length. The interface uses 8 bit long bytes, MSB [Most Significant Bit] first, with each device having a unique address. Any device may be a Transmitter or Receiver, and a Master or Slave. Data and clock are sent from the Master ~ valid while the clock line is high. The link may have multiple Masters and Slaves on the bus, but only one Master may be active at any one time. Slaves may receive or transmit data to the master. I2C defines the electrical layer and protocol, and was developed by Philips Semiconductors. VDD may be different for each device, but all devices have to relate their output levels to the voltage produced by the pull-up resistors [RP].

I2C, IIC Bus Interface Circuit
I2C Interface Circuit

PC motherboard

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Modified 6/13/15
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