EIA-899 Bus

TIA/EIA-899 Electrical Characteristics of Multipoint Low Voltage Differential Signaling (M-LVDS) Interface Circuits for Multipoint Data Interchange

[EIA899 Description]
[LVDS ICs] [Standard Organizations ] [Connectors ]
[PECL to LVDS Conversion] [LVPECL to LVDS Conversion]

EIA-899 Description

EIA644 Interface Circuit
LVDS Interface Circuit

M-LVDS Multipoint LVDS [EIA-899], Addresses a double terminated bus, configurations extends the common-mode range to +/-2 V, with a 11mA drive at 500Mbps max, 200/300Mbps typical for Multi-point. EIA/TIA-644 Balanced (differential) interface [LVDS]; defines the Electrical layer (Receiver and Transmitter) only.
M-LVDS is designed with an output voltage swing of 350mV at better then 400Mbps into a 100 ohm load, across a distance of about 10 meters. LVDS is only an Electrical spec - to be referenced by other specifications, it may be used with either a cable or PWB design. The type of cable determines cable length; Category 3 (CAT3) for 10m in length, CAT5 for longer runs (~20 meters @ 100Mbps, ~50 meters @ 50Mbps, ~100 meters @ 10Mbps). Ribbon cable may be used for sub meter runs. This interface is also listed under IEEE 1596.3.

Other vendor types:
LVDS [EIA-644], Low Voltage Differential Signaling; 3.5mA drive, at 655Mbps max, Point-to-Point
BLVDS Bus LVDS, [Proprietary] 10mA drive designed to handle mulit-card low impedance backplane applications [One bus driver].
GLVDS Ground referenced LVDS, Places the driver output voltage offset closer to ground potential.
LVDM Low Voltage Differential Signaling Multi-Point, [Proprietary], 8mA with one bus driver.

For detailed LVDS design information see the
LVDS Design Data page and may include more vendors.

{LVDS Bus Index}

EIA-644 Bus Pull-up/Pull-Down Resistors

LVDS uses a single 100 ohm termination resistor at the Receiver side of the bus. The Receiver provides failsafe bias so Pull-up/down resistors are not required. Noisy environments may require the addition of bias resistors.

The Pullup/Down Resistors (Idle-line failsafe) are used to keep the +/- inputs of the Receiver(s) inputs at a minimum of 200mV differential or higher. Normally required once the system has reached it's quiescent state, when no drivers are driving the bus. Only one end of the bus requires the resistor network.

{Back to LVDS Bus Index}

EIA-644 Bus Interface IC Manufacturers

IC Vendors;
Aeroflex UTMC {RAD hard IC Manufacturer}

Fairchild Semiconductor Corp. {Differential LVDS Repeater ICs}

Maxim Integrated Products, Inc.

National Semiconductor {Differential Bus Transceiver ICs- Receiver ICs -Driver ICs-SERDES Devices}

NXP {Clock Driver ICs}

ON Semiconductor {Clock Driver ICs}

Pericom Semiconductor Corporation {LVDS Drivers/Receivers/Crosspoint/Repeaters/Distribution IC Manufacturer}

STMicroelectronics {Differential Bus Transceiver ICs - Receiver - Clock Driver ICs}

Texas Instruments 'TI' {RS-644 Differential Driver/Receiver-8 bit Registered Transceiver ICs/SERDES Devices}

IC Manufacturers {All other device types}

{LVDS Bus Index}

LVDS Connector Manufacturers

Recall that EIA/TIA-644 does not define the connectors, so this list should be used as a guide.
Although many different types of connectors are used to carry LVDS signals.

Amphenol {LVDS Connector Manufacturer}


Methode Electronics {LVDS Connector Manufacturer}

Molex {LVDS Connector Manufacturer}

{LVDS Bus Index}

EIA/TIA-644 Standard Organizations

Telecommunications Industry Association; TIA [www.tiaonline.org]

Note the Electronic Industries Alliance {EIA} ceased operations on Feb 22 2011.

{IEEE-899 Bus Index}

LVDS Standards

TIA/EIA-899: Electrical Characteristics of Multipoint Low Voltage Differential Signaling (M-LVDS) Interface Circuits for Multipoint Data Interchange

ANSI/TIA/EIA-644: Electrical Characteristics of Low Voltage Differential Signaling (LVDS) Interface Circuits

Other specifications which use LVDS as the electrical interface include:
SATA, RapidIO, HyperTransport, and InfiniBand.

{IEEE899 Bus Index}

PECL to LVDS Conversion

PECL is a standard implementation of ECL using a positive voltage instead of the common -4.2 volts.

PECL Conversion Circuit
PECL to LVDS Translation Circuit

PECL [reading as Positive ECL] is ECL using a 5 volt supply [as shown in the graphic], with no negative supply voltage.

LVPECL to LVDS Conversion

LVPECL Conversion Circuit
LVPECL to LVDS Translation Circuit

LVPECL [reading as Low Voltage PECL] is ECL using a 3.3 volt supply [as shown in the graphic], and no negative supply voltage.

EIA644 Switching Levels and Comparison to other Differential Standards
LVDS [IEEE644] Interface level Comparison to other Differential Standards

The graph shows the switching level of a number of different interface standards.
Comparing one switching standard to another using valid output low voltage [Vol] and output high voltage [Voh].
PECL and LVPECL are shown with their convention of 5 volts and 3.3 volts, although Positive ECL could use any positive voltage.
RS422 and RS485 are specified to switch up to 6 volts, which is the allowable maximum range, but 3.3 volts is acceptable.
GTL and GTL plus are a common backplane logic.

{Back to IEEE-899 Bus Index}

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Modified 6/13/15
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