- IC By-Pass Design Information -
[Dielectric] [Temperature]
[Board Placement]
[IC By-Pass Caps] [equivalent Cap
Circuit]
[Capacitor Decoupling Value] [Terms]
[Surface Mount Chip Size] [MIL Specs]
[Capacitor
Manufacturers]
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The different capacitor types only come in certain values; How ever the application will push the design toward a particular type.
Dielectric | Paper | Plastic Film | Ceramic | Electrolytic | Mica |
Temp Range | -55C to +125C | -55C to +125C | -55C to +125C | -55C to +125C | -60C to +125C |
Bypass | Large size | Yes | * Yes * | Low Freq | High cost |
Value | .001uF to 10uF | .001uF to 10uF | 1pF to 10uF | 1uF to 100(s)uF | 1pF to 100000pF |
MIL Spec | MIL-C-18312 / MIL-C-39022 | TBD | MIL-C-11015 | MIL-C-62 | MIL-C-5 |
X | -55oC | 2 | +45oC | A | +/- 1% |
Y | -30oC | 4 | +65oC | B | +/- 1.5% |
Z | +10oC | 5 | +85oC | C | +/- 2.2% |
- | - | 6 | +105oC | D | +/- 3.3% |
- | - | 7 | +125oC | E | +/- 4.7% |
- | - | - | - | F | +/- 7.5% |
- | - | - | - | P | +/- 10% |
- | - | - | - | R | +/- 15% |
- | - | - | - | S | +/- 22% |
- | - | - | - | T | - 33%, + 22% |
- | - | - | - | U | - 56%, + 22% |
- | - | - | - | V | - 82%, + 22% |
{Back to Electronic Capacitor Data Index}
Normally capacitors have a stated value at some frequency [1KHz], and
some temperature [room temp]. However that capacitance value will change
by some percentage [depending on dielectric] over temperature. A chart
depicting the percentage change in capacitance depending on dielectric
type versus temperature change is listed on; Cap Value Change Over Temperature.
The chart provides data for Plastic Film capacitor dielectrics.
Derating guide lines for capacitors is listed on the Component De-Rating
page.
{Electronic Capacitor Data Index}
Capacitor placement: to Integrated Circuits [ICs]
The Decoupling capacitor is used to decouple the IC from the power source. The By-Pass capacitor reduces the trace length from the power source to a trace length from the IC to the decoupling capacitor ~ a reduction from many inches to less then an inch. A reduction of 20nH an inch in trace inductance is achieved by introducing a decoupling capacitor in between the IC and its power source. Assuming the power source is a regulator 12 inches away, and the by-pass capacitor is placed within an inch of the IC, the trace inductance is reduced from 240nH to 20nH. The 20nH vaule is just an example.
For a PWB with out a Ground plane, place the capacitor equal distance between the Voltage and Ground pins. Or place the capacitor near the Voltage pin. Run the remaining line directly to the ground trace. Try not to pass into another layer with a via. Limit the number of vias (to zero), each via acts like a low pass filter. Running a long trace between the by-pass capacitor and the IC defeats the purpose of the by-pass cap. As the trace length increases, so does the trace inductance.
Things get better when you have a Ground plane. Place the via on the far side of the connection between the capacitor and chip. This insures the capacitor is not effected by the via [increased inductance]. Make the traces as wide as possible. If you have a near-by island be sure it's stitched with as many vias as possible so it represents a good power or ground connection.
Place the capacitors near the body of the device, leaving the shortest [and widest] possible trace. Additional larger tantalum capacitors may be placed around the board. The tantalum help to reduce the over-all impedance of the power plane. The larger value near-by tantalum also helps to re-charge the ceramic, instead of taking the charge from the power supply source. Placing Power planes adjacent to ground planes in the board stack-up also helps. It doesn't hurt to embed signal layers between a ground layer in the stack-up either, assuming you can add board layers. Refer to this page for a graph showing the frequency response developed from placing two capacitors in parallel Compound Capacitor By-Passing
A capacitor only has an effect with in a certain distance from the device. The more you move away from the capacitor, the less it does. The Inductance, and Resistance (of the Trace) tend to increase. This is the reason the App notes recommend placing capacitors on the reverse side off the board - over the (power) pin. It's a trade-off between the (low Pass) filter effects of passing through a via or an elongated trace. How ever these capacitors placed out across the board do have an effect in reducing the impedance of the board ~ the power and ground planes. Assuming most of the capacitors on the board are 0.1uF by-pass caps, then placing 2uF or 4uF around the board helps the impedance.
The Classic approach. The capacitor is equal distance between both the positive and negative supply.
-- Placement: Dont ask for it or, plan for it, or depend on it - it just
costs to much {hand routing}.
The point is, know if the design can handle another placement. This
particular placement helps in noise suppression,
but hurts with critical signal routing. If this particular device needs
noise suppression more then signal routing, then pick the cap placement
first, otherwise let the computer pick the placement. The by-pass
capacitor stores an electrical charge that is released to the power line
[to the IC], whenever a transient voltage spike occurs. So by-pass
capacitor provides a low impedance supply, thereby minimizing the noise
generated by the switching outputs of the device.
Because the capacitor is used to supply current to the IC it wants to be
close to the Vcc pin. The more current the device needs to supply - the
larger the cap [or increase the number of same value capacitors].
If this a clock driver - watch the length of the trace {another page},
then give the Cap priority.
The value of the Decoupling Capacitor that should be used depends on your
load the IC has to drive. From the graphic above the load of device A
[the driver] is device B [the receiver]. If device A has to drive one
input at 3.3 volts then the load depends on the load of both inputs,
taking into consideration the rise time of the signal. The input
capacitance for a given device is parameter Ci in the device
data sheet. If the receiver [B] has a load of 12pF [Ci] and
the output driver [A] has a rise time of 1nS then the current required
is: I = dV / dt or I = 12pF*(3.3v)/1nS. The current required = 39.6mA. If
we keep the voltage droop to 3.0 volts, or a reduction of 300mV.
The capacitor then equals: C = I * dt / dV. C = 39.6mA * 1nS/300mV =
22pF
This is the value of the by-pass capacitor used with IC 'A', The required by-pass capacitor value for IC 'B' would be calculated in the same manner.
Choose a capacitor whose resonant frequency is at least as high as the
corresponding edge rates of the switching signals,
where frequency response @ 1 / (3.5 × Trise, or fall).
Design Note; In basically every data sheet a 0.1uF is indicated as a general rule of thumb.
IC 'B' uses two By-pass capacitors, a small value ceramic [0.1uF] and a larger value tantalum capacitor [2.2uF] for example.
Using two by-pass capacitors, normally a decade apart in value is called Compound By-passing.
A number of data sheet require compound by-passing on some power pins.
However because of pin density or lack of board space it is not always possible to comply with the data sheet.
Design Hint; Adjacent Power and Ground planes form a capacitor. It is highly recommended to use the power planes as a low value, high speed, bypass capacitor. This can be accomplished by reducing the thickness of the core between power planes. So when determining the Printed Wiring Board [PWB] stack-up try to place a power plane next to a ground plane to form a 'board-wide' capacitor.
equivalent Capacitor Circuit, was moved to equivalent Capacitor Circuit
Question; which decoupling capacitors value to use? Answer; refer to the equation above.
.Common Cap Values. | Printed Wiring Board Info | Ground/Power Plane | Component Chip Size | Dictionary | RC Time Constant |
{Back to Electronic Capacitor Data Index}
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