PXI Express System Timing Slot Pinout, Signal Names, and Pinout Description

PXI Express Bus System Timing Slot

PXI Express Bus System Timing Slot Pin out and Signal Names
The PXI Express System Timing slot pin out is provided below.
The connectors used are XP4/XJ4, XP3/XJ3, TP2/JP2, and TP1/JP1

**PXIe XP4/JP4 Connector Signal Assignments**
Pin #	Signal Name	Signal Name	Signal Name	Signal Name	Signal Name	Signal Name	Signal Name
--	Row Z	Row A	Row B	Row C	Row D	Row E	Row F
1	GND	GA4	GA3	GA2	GA1	GA0	GND
2	GND	5Vaux	GND	SYSEN#	WAKE#	ALERT#	GND
3	GND	12V	12V	GND	GND	GND	GND
4	GND	GND	GND	3.3V	3.3V	3.3V	GND
5	GND	PXI_TRIG3	PXI_TRIG4	PXI_TRIG5	GND	PXI_TRIG6	GND
6	GND	PXI_TRIG2	GND	ATNLED	PXI_CLK10_IN	PXI_CLK10	GND
7	GND	PXI_TRIG1	PXI_TRIG0	ATNSW#	GND	PXI_TRIG7	GND
8	GND	PXIe_SYNC_CTRL	GND	RSV	PXI_LBL6	PXI_LBR6	GND

**PXIe XP3/JP3 Connector Signal Assignments**
Pin #	Signal Name	Signal Name	Signal Name	Signal Name	Signal Name	Signal Name	Signal Name	Signal Name	Signal Name
--	Row A	Row B	Row ab	Row C	Row D	Row cd	Row E	Row F	Row ef
1			GND			GND			GND
2			GND			GND			GND
3			GND			GND			GND
4			GND			GND			GND
5			GND			GND			GND
6			GND			GND			GND
7			GND			GND			GND
8			GND			GND			GND
9			GND			GND			GND
10	RSV	RSV	GND	RSV	RSV	GND	1PERp7	1PERn7	GND

Additional PXI notes:

PXI stands for Compact PCI for Instrumentation Bus
The number sign in the pinout table above refers to: "A # symbol at the end of a signal name indicates that the signals asserted state occurs when it is at a low voltage. The absence of a # symbol indicates that the signal is asserted at a high voltage.
The pin descriptions which indicate a Key is not a pin, but a male or female void [key].
The V(I/O) pins are un-named in this table. In a +5 volt system the V(I/O) pins are +5volts, in a +3.3 volt system the V(I/O) pins are +3.3 volts.

PXI [and cPCI] uses 2mm 'Hard Metric'; IEC 1076-4-101, a number of different pin arrangements. Normally the outside Ground rows (which are compression pins) 'Z' and 'F' are not counted as pins. OEM pin numbering may be by cPCI or in accordance with IEC 61076-4-101 (which is reversed). The term "Hard Metric" only means that metric dimensions are preferred ~ with-out regard to inches.

PXI [and cPCI] 2mm connectors mating distances [12.50mm] matches the 96 pin DIN 41612 connectors used with other EuroCard packaging [IEC 273 or IEEE 1101, 1101.10], like VMEbus. FutureBus connectors, which also use 2mm style has a mating distance of 10mm, and is not compatible with cPCI connectors.

The connector types below are counting signal pins (not the ground rows), as indicated on many data sheets:

Type A connector; 110 pins, Keyed (J1/J4),([25 rows x 5 columns] - [3 rows x 5 columns of Key])
Type B connector; 110 pins (J2/J5), [22 x 5]
Type B connector; 95 pins (J3), [19 x 5]. This is also used as P0 with VME64
Type C connector; 55 pins [11 x 5]
Type AB connector; 95, 110, or 125 pins

There are other stlyes:
Type L connector; # contact cavities to accept power insert contacts
Type M connector; # contact cavities to accept power insert contacts/with half the connector having normal pins

Back to the main PXI Compact PCI [cPCI] for Instrumentation Bus page, which contain a description of the bus, connector manufacturer, and IC manufacturer links.

Site Navigation: Engineering Home > Electrical Buses > Backplane Buses > PXIe Bus > PXIe System Timing Slot Signal Assignments.


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