Bus and BackPlane Design Data

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Buses Listed in Alphabetic Order
The is the primary listing of all the computer, processor, IC and cable buses listed on the site. The buses are listed under their common name; however the bus may be known by another name. For example, a bus may have a specification name/number and may also be known under a Marketing name ~ the most common of the two will be listed.
Not all bus types are Individually listed here; Some links including the Automotive buses, Vehicle buses, Avionics buses, Field buses, Mezzanine buses, Switched Fabric, SoC buses, Video buses, and VME add-on buses point to another page and provide a number of different bus types on their pages. Also, a few sub-buses residing under a main bus specification may only be listed on that main bus page. All of the bus pages include some type of description with links to IC manufacturers, cable manufacturers, connector manufacturers, or PWB manufacturers. If you know the bus belongs in one of the sub-listing check that listing and not the alphabetic listing. In many cases the connector pin outs are included, in addition to the vendor listing a circuit implementation and links to the Organization which controls the specification or standard. Descriptions and the data provided vary with each bus, with some buses only having a brief description below, pointing to another new page.

Back to the top level Bus tree above this page. Another alternative is to go to the root page index page and search on the bus name, using quotes. The following page provides a comparison between many common buses in a table format: Interface Bus Table. This page is reduced to show only pages with bus pinouts.


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Bus Interface Table {Many of the more common Interface buses presented in a table, by Bus Function and speed for Comparison}

10Base2 / 10Base5 {Ethernet running over Coax, maximum bus length is 500 meters, at a maximum speed of 10M bits/sec}

10BaseT {Ethernet running over Twisted-Pair wire, maximum bus length is 100 meters, at a maximum speed of 10M bits/sec}

10GFC {10 Gigabit Fibre Channel, runs at speeds as 12.75GBd [GigaBaud]}

100BaseX {Ethernet running over Twisted-Pair, Coax or Fiber, maximum bus length is 100 meters, at a maximum speed of 100M bits/sec}

1000BaseKx {1 Gb/s serial operation, see Ethernet. Backplane Ethernet; 1000BaseKX over one lane, 10GBaseKX4 over four lanes, and 10GBaseKR over one lane. 1000BaseKX; 8B/10B encoding, with a signaling speed of 1.25Gbaud, 10GBaseKX4; 8B10B encoding, with a signaling speed of 3.125Gbaud per lane [2.5Gb/s per lane], 10GBaseKR; 64B/66B encoding, with a signaling speed of 10.3125Gbaud}

802.11 {defines a Wireless Local Area Network [WLAN] using the Ethernet protocol operating in the 2.4 GHz and 5GHz ISM bands}

Access Bus {Is a low speed 4-wire serial bus aimed at the PC. Access.Bus uses the I2C bus as the electrical hardware interface. The maximum speed is 100kbps over a maximum cable distance of 10 meters, however a repeater may be used.}

Acquisition Bus {A common term, but not the name of any interface bus}

ADB Bus {[Apple Desktop Bus] was a serial bus used by Apple computer to drive a mouse or keyboard over a 4-wire cable at a data rate was 125kbps. The ADB bus was replaced by Firewire and is OBSOLETE.}

AdvancedTCA Bus {ATCA Description, Chassis/Backplane based Telecommunications bus with a description and manufacturer links}

AES/EBU {AES/ EUB [Audio Engineering Society/European Broadcasting Union] is one of the common names for a digital audio transfer standard The standard is also known as XLR because the AES/EBU digital interface is usually implemented using 3-Pin XLR connectors, which happens to be the same type connector used in a professional microphone. One cable carries both left and right-channel audio data. AES/EBU is an alternative to the S/PDIF [Sony/Philips Digital Interface] standard. S/PDIF is a an audio transfer file format which uses an RCA connectors.}

AGP Bus {The Accelerated Graphics Port bus is used as a chip-to-chip Computer Local Video Bus. The AGP bus was derived from the Parallel PCI bus with a few additional signals. AGP 8x uses a 533MHz clock with 32 bytes/clock, and has a Bandwidth of 2.1GB/s [0.8V signal swing]. The AGP bus was replaced by the PCIe Bus.}

AMR Bus {Audio/Modem Riser. Specification defines a hardware scalable OEM PC mother board riser board and interface, which supports both audio and modem. An MR slot will provide a Modem function, while an AMR slot will provide both an Audio and Modem function }

Apple Computer Buses {Apple, Macintosh or MAC Computer Buses; Connector Pin-Outs only}

ASI {Advanced Switching Interconnect, Fabic}

ATA Bus {IDE/ATA Personal Computer [Parallel; PATA] cable Bus used for Hard drives, Floppy and CD drives. Top bus speed is 133MBytes/sec over an 18 inch Parallel cable. IDE: [Integrated Drive Electronics], ATA: [Advanced Technology Attachment]. ATA was replaced by the Serial ATA bus which uses 4-wires instead of 40.}

ATM Bus {Asynchronous Transfer Mode [ATM] uses Synchronous Optical Network/Synchronous Digital Hierarchy (SONET/SDH), DS-3/E3 as the physical medium}

Automotive Bus(s) {MOST Bus, J1850 Bus, D2B, CanBus, IDB1394, FlexRay, byteflight, OBDII ..}

Avionics Bus(s) {ARINC, SFODB, SpaceWire, MIL-STD-1553, MIL-STD-1760, MIL-STD-1776..}

Bluetooth {Wireless transceiver operates in the 2.4GHz ISM band}

BPL {Broadband over Power Line, Internet over high voltage transmission lines}

BST Bus {vehicle safety bus}

byteflight {is used for safety-critical applications in motor vehicles [air-bags]. Byteflight is a TDMA [Time Division Multiple Access] protocol that runs at 10Mbps over [2-Wire or 3-Wire] Plastic optical fibers [POF].}

CableCARD {PCMCIA based HDTV Cable box replacement used with HDTVs}

CAN Bus {Controller Area Network (CAN) specification defines the Data Link Layer, ISO 11898 defines the Physical Layer. The maximum copper cable length is 1000 meters. Used as an Industrial Field bus and Automotive 2-wire Bus.}

Cardbus [PCMCIA] {Implementation the 32 bit PCI bus in a PCMCIA form factor: The page supplies a description, connector pin out, and IC/Connector Links}

C-Bus {and C-Bus II was developed by Corollary Inc. as a multiprocessing chip set architecture used with motherboards with more then one linked processor [4-way and 8-way systems]. Corollary Inc. was purchased by Intel in 1997.}

Centronics Bus {Personal Computer [PC] uni-Directional Parallel Peripheral Interface, mainly used as a Printer Bus. The maximum recommended length for a printer cable is 12 feet. The Centronics parallel bus was replaced by the IEEE-1284 printer bus in 1995.}

CGA [Color Graphics Adapter]: {The CGA standard [1981] supports several different video modes; the highest quality text mode is 80x25 characters in 16 colors. The monitors are digital with a composite signal which is at TTL logic levels; Hs, Vs, and RGBI all at TTL logic levels. OBSOLETE.}

CMR Bus {The Communication and Networking Riser Specification defines a hardware scalable Original Equipment Manufacturer (OEM) mother board riser and interface that supports the audio, modem, and local area network (LAN) interfaces of core logic chip-sets. This standard does not support an expansion slot, but an OEM built in board.}

COM; [Computer-on-Modules] {Embedded computer board standard controlled by PICMG. COM uses the ETX form factor which was originally developed by Kontron.}

COM Express; [Computer-on-Modules Express] {Embedded computer board standard controlled by PICMG. COM Express uses the ETX form factor which was originally developed by Kontron. COM Express supports PCI Express, Serial ATA, Serial DVO, and LVDS. COM Express is the PCI Express version of ETX; (Embedded Technology eXtended) with a form factor of: 95mm x 111.6mm (5.75 x 8 inches).}

CompactFlash Card {Mass Storage removable card which operates like an ATA drive using Flash memory devices. CompactFlash is smaller then a PCMCIA card and operates up to 66MBps using a 50 pin connector.}

Compact PCI Bus {cPCI Bus is an embedded PCI bus using the Euro-card form factor; Mechanical description and pinouts provided.}

CompactPCIexpress {PCI Express [PCIe] on a 3U x 160mm form factor in a Compact PCI [cPCI] environment. See the CompactPCI or PCI Express listing for additional information, or the PCI Express listing.}

CompactTCA {offers fabric support similar to AdvancedTCA Bus but at a reduced bandwidth in a 6U "CompactPCI compatible" form factor. Refer to AdvancedTCA, or Compact PCI listed above.}

Composite Video {Single Yellow video cable used in AV gear.}

Control S Bus {Sony S-Link Bus Information; Control-S, and Control-A, no longer in service}

cPCI Bus {Compact-PCI Bus connector pin out-Information-IC/Connector Links, Pin-Outs}

cPCIe {PCI Express [PCIe] on a 3U x 160mm form factor in a Compact PCI [cPCI] environment. See the CompactPCI or PCI Express listing for additional information, or the PCI Express listing.}

CSA Bus [Communication Streaming Architecture] (Intel Corp. uses the [proprietary] CSA Architecture which is based on the HubLink Architecture. CSA provides a bi-directional bandwidth throughput of 266 MB per second (2 Gbps). CSA is a dedicated bus that connects to the Memory Controller Hub (MCH) on the Chipsets.)

CT Bus {[Computer Telephony] Bus is a Telcom Bus implemented on either a PCI or cPCI card as a sub bus interconnected via a cable}

DataFlash Card {Mass Storage removable Flash Memory card. One of a number of removible Flash Memory cards.}

Device Bay {A defined form factor peripheral which connects via USB and/or Firewire to the PC, but as of 2001 is not supported by Windows. The specification may be obtained from the 1394 Trade Association, www.1394ta.com}

DFP [Digital Flat Panel] {Connector pin-out and signal names}

DMP [Digital Media Port] {a USB like interface used by Sony A/V gear}

Domestic Digital Bus {[D2B] is an optical data bus system connecting audio, video, computer peripheral and telephone components in a [single] ring structure within the vehicle. Mercedes-Benz uses a combination ring and Star optical [650nm] topology at a speed of 5.6MBps [20MBps maximum] at a maximum fiber distance of 10 meters [1 coupler] or 7 meters [2 couplers].}

DSI Bus {Distributed Systems Interface, developed by Motorola as a dedicated safety bus. DSI is a two-wire serial bus linking safety-related sensors and components in vehicles.}

DSL {DSL has a maximum cable distance of up to 18,000 feet, but the distance and speed depends on the type of DSL. Also called xDSL}

DVI {[Digital Visual Interface] is a standard for high-speed, high-resolution digital displays.}

EBX Specification {Embedded PC Mother Board form factor; 8.00" x 5.75", Is an Embedded computer board standard now supported by PICMG. The EBX form factor is used as a PC104 platform. EBX is not a bus standard, but a board standard.}

EFM Specification {Ethernet in the First Mile.}

EGA {[Enhanced Graphics Adapter]: This EGA video standard [1984] offered improved resolutions and more colors than CGA. EGA allowed graphical output up to 16 colors (chosen from a palette of 64) at screen resolutions of 640x350, or 80x25 text with 16 colors, all at a refresh rate of 60 Hz. The monitors have a digital interface. OBSOLETE.}

EIA-232 Bus {RS232 serial bus has a maximum cable length of something less then 20 meters, and will operate up to 20kbps. [Copper wire interface]}

EIA-422/EIA485 Bus {EIA422/EIA485 [RS422/RS485] has a maximum cable length of 1200 meters at 200kbps over a balanced (differential) interface. [Copper wire interface]}

EIA-423 Bus {EIA423 [RS423] Bus Standard-Information-IC Links. [Copper wire interface]}

EIA-449 Cable Buses {EIA-449 Bus cabling interface. The maximum cable distance is 60 meters [2.1Mbps], Description, Information, and cable Pin outs. [Copper wire interface]}

EIA-530 Cable Bus {Defines a cabling interface, Using EIA422 /EIA423 as it's electrical interface. The maximum cable distance is 60 meters [2.1Mbps]. [Copper wire interface]}

EIA-568 / EIA-569 Bus {Commercial Building Telecommunications Wiring Standard using 100 ohm Un-shielded Twisted Pair; with Information and connector Pin Outs}

EIA-644 Bus {Low Voltage Differential Signaling [LVDS] Wiring Standard; with a description, Information, Interface Circuit, and OEM links. ANSI/TIA/EIA-644 only defines the Electrical layer so there is no pin-out provided by this specification. LVDS with CAT5 cable runs at ~20 meters @ 100Mbps, ~50 meters @ 50Mbps, ~100 meters @ 10Mbps}

EISA {Extended Industry Standard Architecture or Enhanced ISA bus: 8MHz @ 8/16/32 bits data bus, 32 bit address bus; PC Expansion Bus, compatible with ISA. An ISA card will work in a EISA slot, but an EISA card will not work in an AT slot. The EISA bus is OBSOLETE, replaced by the PCI and AGP buses}

Embedded PCI-X Specification [ePCI-X], The PICMG 1.2 specification defines the mechanical and electrical interface to support a standard form factor PCI computer system with either two PCI/PCI-X busses or a single PCI/PCI-X bus. The document also defines the electrical and mechanical connections for a single board computer and backplane. This is an upgrade to the PCI-ISA specification. PCI-X capabilities are added to the PCI bus and the ISA bus is replaced by a second PCI-X bus, on the PCI-ISA backplane. The board retains the same mechanical dimensions as PCI-ISA but the components move to the PCI side and the slot occupies a PCI position on a backplane. Also refer to the PCI-ISA listing, or the PCI listing}

EPIC; (Embedded Platform for Industrial Computing) with a form factor of: 4.5" x 6.5". EPIC is smaller then the EBX standard. EPIC is an embedded SBC format which also supports PC/104 modules.

Ethernet Bus {Ethernet Bus Standard-IC Links}

ETX; {(Embedded Technology eXtended) with a form factor of: 95mm x 111.6mm (5.75 x 8 inches). Is an Embedded computer board standard supported by PICMG. ETX is a board standard, not a bus standard}

EVC [Enhanced Video Connector] {Connector pin-out and signal names}

FastBus {IEEE Std 960-1993 Defines the Mechanical, Electrical, and Protocol layers. FastBus used a 32 bit address and data bus. FastBus is out-dated but still in operation, not recommended for new designs.}

FDDI Protocol {Fiber Distributed Data Interface Protocol Standard-IC Links}

Fiber Channel {Fibre Channel, now runs at speeds as high as 2.125 Gbps [200 Mbytes/sec] over twisted-pair copper or optical-interconnect [optical distances up to 10 km]. Fibre Channel is primarily used in high-end server SANs [storage-area networks]. Used for transferring data to workstations, mainframes, supercomputers, desktop computers, storage devices, displays and peripherals}

Field Bus(s) {Serial Industrial Field Bus Standards, Descriptions and IC Links}

FireWire Bus {IEEE 1394 Bus Standard using CAT5 cable allows 100Mbps data to travel 100m}

Flexbus {was developed to connect SONET/SDH physical layer (PHY) framer and mapper ICs to link layer devices such as SARs and network processors for asynchronous transfer mode (ATM), packet over SONET (POS), and Ethernet applications. Flexbus 3 operates at 2.5Gbps (OC-48); Flexbus 4; SPI-4 operates at 10Gbps (OC-192).}





FlexRay Bus {is a Point-to-Point [Star topology] 10Mbps [Fault-Tolerant] Automotive bus, running over UTP or STP cable.}

Floppy Drive {Pinout for the PC Floppy Drive}

FPDI-1 [Flat Panel Display Interface] {describes the electrical, logical, and connector interface between flat panel displays and display controllers in an integrated environment.}

Futurebus {Is a back-plane bus specification. Page gives a brief description of the bus and a description of each of the pins.}

Gigabit Ethernet {operates using either Shielded Twisted Pair [STP] copper, Un-Shielded Twisted Pair [UTP], or CAT-5 copper or fiber cable. Gigabit Ethernet also runs over a backplane at over 1GHz.}

GigaBridge {PICMG 2.16 R1.0 is a PCI-switching technology developed by PLX Technology Inc. It runs on a scalable, self-healing ring topology supporting OC-12 to OC-48 trunk speeds. GigaBridge uses a 6.4-Gbit/s low-voltage differential signaling (LVDS) link interface.}

GPIB Bus {IEEE-488 Parallel Equipment Bus, Digital Interface for Programmable Instrumentation operates at 1MBytes/s over a maximum cable length of 20 meters, or 2 meters per device which ever is less, on a Copper wire interface}

Hard-Drive buses 'Older, {OBSOLETE' [Before ATA and SCSI] used to interface with hard drives include: XTA, ST506, and ESDI. XTA [XT Attachment] - Is a rarely used implementation of the ATA Interface that used an integrated 8 bit XT controller. ESDI [Enhanced Small Device Interface], was considered a successor to ST506/412 with faster transfer rates and supporting larger drive sizes. The ESDI bus used the same two-cable connection as the ST506.}

H-Bus ("H-Bus is a dedicated input bus designed for transmitting digital media streams from multiple sources to one acquiring host device". The H-Bus was developed by MIT, and operates at 640 Mbps. The H-Bus may have been developed to compete against IEEE-1394 [Firewire], IEEE-1596 [SCI], and Ultra-SCSI.)

HDLC Frame (OSI Layer 2 High-level Data Link Control Protocol Frame description)

HIC (IEEE-1355) (Is a bidirectional serial interconnect which builds a scalable parallel system using a pair(s) of unidirectional lines. HIC runs on 1 to 10 Meters cable distance at 38MBps over copper, and with fiber up to 100 to 3000 Meters cable distance at 169MBps, distance depends on fiber type)

HIPPI 'High-Performance Parallel Interface' (Parallel HIPPI operates with a throughput of 200 MBps [HIPPI-1600], up to 25 meters, using copper cabling. Serial HIPPI will run at 200 MBps [HIPPI-1600 Serial] using coaxial cable for distances up to 25 meter, and fiber optic cabling for distances up to 1K meter (Multi Mode) or 10K meters (Single Mode) HIPPI-6400 will run at 1.6Gbps.)

HPIB Bus {IEEE-488 Parallel Equipment Bus, also called GPIB}

HSSI Bus {High Speed Serial Interface used for leased lines [like DS3] and Wide Area Networks [WAN]. High Speed Serial Interface Bus specification has a Maximum rate of 52Mbps [bits per second] using differential ECL [Emitter Coupled Logic] over shielded twisted pair [STP] cable (similar to SCSI II) with a maximum distance of 50 feet.: Page gives the Bus specification, and Connector/Cable Links}

HubLink Bus (Intel Corp. uses the [proprietary] HubLink [HL] architecture in its Intel 8xx chipsets, as a chip-to-chip interface. I believe HubLink 1.0 was an 8 bit wide bus running at 66MHz. HL 1.5 is 8-bits wide and quad pumped at 133 MHz with a bandwidth of 532 Mbps, and is used to connect the MCH to the ICH. HL 2.0 is 16-bits wide and quad pumped at 133 MHz for a theoretical bandwidth of 1.064 Gbps. The faster HL 2.0 interface connects the MCH [Memory Controller Hub] to the PCI-X and IBA bridges. HubLink is now known as the Hub Interface.)

HyperTransport Bus (A Point-to-Point bus with [at least] two unidirectional links; Uses 2, 4, 8, 16 or 32 bits [in each direction] with a data rate of 800Mbs/per pair with a 400MHz clock. Formally known as Lightning Data Transport (LDT). Used in mobile personal computers, servers, network equipment, embedded applications, and communications equipment)

I2C Bus {Inter-IC [I2C] Originally designed to be a battery control interface, now used in microcontroller-based [uP] professional, consumer and telecommunications control, diagnostic and power management bus. The I2C bus uses a bi-directional Serial Clock Line [SCL] and Serial Data Lines [SDA]. Three speed modes are specified: Standard; 100kbps [Bits per Second], Fast mode; 400kbps, High speed mode 3.4Mbps all with a maximum bus capacitance is 400pF. The page provides a link to download the I2C Bus specification. Also called IIC Bus}

I2O Bus (Intelligent Input/Output [or Intelligent I/O] Bus was designed to eliminate I/O bottlenecks by utilizing special I/O processors [IOPs] to off-load work. It was more a Software driver architecture spec then hardware bus. The specification was released in 1997, looks like work on the spec stopped in 2000. Also called IIO Bus.)

I2S Bus (Inter-IC Sound [I2S] is a serial bus designed for digital audio devices. The I2S design handles audio data separately from clock signals. An I2S bus design consists of three serial bus lines: a line with two time-division multiplexing (TDM) data channels, a word select line, and a clock line. The I2S bus turns up on DAC's or micro-processors. Also called IIC Bus)

IBA Bus {Intermediate Bus Architecture. A power line running on cable or PWB from one voltage regulator to any regulator}

IDE Bus {IDE, ATA or PATA, Internal parallel Bus used as a [Personal Computer] Hard-Drive interconnect. The current maximum bus speed is 133MBps over an 18 inch Parallel cable.}

IEEE-488 {Digital Interface for Programmable Instrumentation, HPIB Parallel Equipment Bus, also called GPIB; Detailed description with connector pin outs, Information, a Timing diagram, and IC/Connector Links}

IEEE-1174 { [Serial Interface for Programmable Instrumentation] is basically IEEE-488 over an RS-232 link. IEEE-1174.0 defines the electrical and mechanical implementation over RS-232. IEEE-1174.1 defines ports GPIB onto the serial interface. IEEE-1174.2 details the functionality and implementation of the required IEEE-488.2 over the serial link [EIA/TIA-574]. }

IEEE-1284 {Personal Computer parallel Bus Standard and IC Links. [Copper wire interface]. Used as a Bi-Directional Parallel Peripheral Interface, mainly used as a Printer Bus for Personal Computers. The maximum recommended length for a printer cable is 25 feet. The old Centronics parallel cables run out to 12 feet.}

IEEE-1355 (The HIC bus is a bidirectional serial interconnect which builds a scalable parallel system using a pair(s) of unidirectional lines.)

IEEE 1394 Bus {IEEE 1394 Bus Standard using CAT5 cable allows 100Mbps data to travel 100m}

IEEE-1596 {SCI (Scalable Coherent Interface). SCI is a scalable network, nodes are interconnected in a point-to-point unidirectional link [ring]. The bandwidth grows with the number [concurrent] nodes used. SCI links are operate at 1 Gbps [serial], or 1 GBps [16-bit parallel], using a 250-MHz bi-phase clock over fiberoptic or twisted-pair wires. Physical SCI controllers use LVDS signaling levels for 16 and 8 bit wide links.}

IEBus {[Inter Equipment Bus] is used as In-vehicle bus support using half duplex asynchronous [Multi-Master] communication with CSMA/CD for access control. Two differential lines are used; Data+ / Data-. Two modes are defined: Mode 0 uses 16 bytes/frame and runs at 3.9kbps or 4.1kbps. Mode 1 uses 32 bytes/frame and runs at 17kbps [6MHz Osc.] or 18kbps [6.29MHz Osc.]. The IEbus allows 50 units on the bus over a maximum length of 50 meters. The cable capacitance is rated to have 8000pF max [6MHz] or 7100pF max [6.29MHz]. The bus is terminated to 120 ohms at each end. Series protection resistors of 180 ohms are also used. The IEBus was developed by NEC Electronics.}

iLink { is Sony's name for FireWire, i.Link is based on IEEE-1394 using conventional metallic conductors.}

Industrial Board Formats {Links and Board sizes}

Industrial PCI Express {[IPCI-E], PICMG 1.3 adds PCI Express to the PCI-ISA Passive Backplane Specification.}

InfiniBand bus (Using Bi-direction differential LVDS wire pairs, over fiber or copper cable. InfiniBand Description, IC Links)

IP / SoC Core Buses {Intellectual Property [IP] or System-On-Chip [SoC] Bus connects pre-designed modules [IP's] used in FPGAs, PLDs, or ASICs}

IRDA Bus {IRDA -Information-IC/Connector Links}

ISA/AT Bus {8MHz @ 8 and 16 bits data bus, 24 bit address bus, +/- 12 volts, +/- 5 volts, 15 Interrupt lines. The standard drive level is 24mA for all non-Open Collector signals on the bus. The AT card used the standard (edge) connector provided by the XT bus and added an additional (edge) connector behind that with the same pin-spacing @ 0.1 inch center-to-center. The additional connector has only 38 (19 per side) fingers, while the XT connector had 62 (32 per side) fingers. The Mother Board could then accept either an 8 or 16 bit card in an 8 bit slot (XT), or (if the connector was provided) a 16 bit card in an AT slot. The additional connector provided 4 additional address lines , and 8 additional data lines. The PCI bus has replaced much of the PCAT market}

ISA/XT Bus {Obsolete; 4.77MHz @ 8 bits, +/- 12 volts, +/- 5 volts. The XT bus used a 62 pin (.1" center) edge connector; 31 pins per card side. Used a single oscillator of 14.31818MHz which was divided by 3. 8 Data lines, 20 Address lines, 1 Clock line, 1 Reset line, 8 Interrupt lines. Some 8 bit cards have skirts which extend the board below the depth of the top of the connector to allow additional circuitry. These cards, with skirts, are not compatible with the 16 bit AT bus. The XT bus uses connector J1, AT uses J1 and J2.}

ISDN Bus {[Integrated Services Digital Network] ISDN Bus Description, Standard and IC Links}

J1850: {Automotive bus takes two forms; A 41.6Kbps Pulse Width Modulated (PWM) two wire differential approach, or a 10.4Kbps Variable Pulse Width (VPW) single wire approach. The single wire approach may have a bus length up to 35 meters (with 32 nodes).}

Joystick Interface {The Joystick port used with Personal Computers using a 15pin D connector.}

JTAG Bus {Serial four wire test bus used to 'Boundary-Scan' IC's; at the chip level [JTAG: Joint Test Action Group]}

Keyboard Interface Bus {The serial Keyboard used on Personal Computers [PCs] is a 6 pin Circular DIN.}

LocalTalk {Apple Personal Computer LocalTalk pin out.}

LIN bus {[Local Interconnect Network] is used as an in-vehicle [Automotive] communication and networking serial bus between intelligent sensors and actuators. The LIN specification covers the transmission protocol [Physical Layer and the Data Link Layer of LIN], and the transmission medium. The maximum communication speed on a LIN bus is 19200 baud.}

LVDS Bus {[Low Voltage Differential Signaling] LVDS/M-LVDS is an electrical only standard working to a distance of 10 meters [referenced by other specifications], Description, Information and circuit implementations}

M-Bus {is a protocol [EN1434-3] for remote reading of Heating or Electrical energy counters. The physical layer supports the data transmission as well as the power supply over a two wire cable. The data exchange follows a Master-Slave structure where the PCD is master while all counters are slaves. The M-Bus document can be obtained from m-bus.com }

MCA {Micro Channel Architecture bus: Designed to correct the problems with the ISA bus, but never caught on out side of IBM machines. The bus is Obsolete, later replaced by the PCI bus.}

MDA [Monochrome Display Adapter]: {established by IBM as part of the original Personal Computer [PC]. MDA is a monochrome-only, text-only standard, allowing text display at 80x25 characters. OBSOLETE.}

Mezzanine Bus(s) {Daughter Board form factors; PC MIP - PMC - IP}

MicroTCA {defines a backplane architecture designed to support AdvancedMC (AMC) modules}

MicroUSB {standard 2.0 USB using a micro-connector}

MICROWIRE Bus {MICROWIRE is a [full-duplex] serial interface standard defined by National Semiconductor. The MICROWIRE protocol is essentially a subset of the SPI interface, CPOL = 0 and CPHA = 0. MICROWIRE operates up to 3Mbps}

MIL-STD-1553 Bus {MIL1553B is a dual redundant differential bus defined by Military Standard 1553 [MIL-STD-1553]. Operates at 1.0 megahertz (MHz).}

MIL-STD-1397: {NTDS; MIL-STD-1397, Input / Output Interfaces, Standard Digital Data, Navy Systems.}

Mini PCI {Is a small form factor version of a PCI card for Laptops/NoteBook computers. Mini PCI uses a subset of the PCI specification with a 32-bit bus running at 33MHz.}

M-Module {Yet another Mezzanine card format, out-dated}

Modem Interface Bus {A listing of International Telegraphic Union Modem standards}

MOST bus: {Media Oriented Systems Transport, a multimedia fiber-optic (low overhead, low cost) point-to-point network implemented in a ring, star or daisy-chain topology over Plastic optical fibers [POF] for Automotive applications.}

Mouse Port {The serial mouse used on Personal Computers [PCs] is a 6 pin Circular DIN. The pin-out for the Keyboard or Mouse port is: Pin 1; Data, Pin 2; Reserved, Pin 3; Ground, Pin 4; +5 Vdc, Pin 5; Clock, Pin 6; Reserved. }

MPI Bus {The serial MicroProcessor Interface [MPI] bus consists of a bidirectional [three-state] data line [DIO], and a Clock line [DCLK]. The clock frequency is 4.096MHz. The MPI bus is a synchronous Master/Slave serial bus. Using 8 bit words, MSB is transmitted first}

MTM Bus {Serial five wire Test and Maintenance Bus used to 'Boundary-Scan' cards; at the board level. The MTM bus tests at the board level, while JTAG [listed above] tests at the chip or IC level.}

Multibus I/II {IEEE-1296 had a 32 bit bus which ran at 80MBps, the card sizes are 3U x 220mm, and 6U x 220mm. This bus is out-dated but still in operation ~ not recommended for new designs.}

Multimedia Card {The Multimedia Card [MMC] is another flash memory card format. The device size is 32 mm x 24 mm x 1.4 mm}

MuTIOL (Silicon Integrated Systems Corp. [SIS] uses MuTIOL as a Proprietary Interconnect between it's North and South bridge chips. MuTIOL [Multi-threaded I/O Link] is a 16-bit 266MHz [533MB/s Bandwidth] bi-directional data bus.)

Nexus 5001 Standard for a Global Embedded Processor Debug Interface

NMEA 2000 is a CANbus link interface for marine vessels.

NTDS: {MIL-STD-1397, Input / Output Interfaces, Standard Digital Data, Navy Systems. Type A {NTDS Slow}, Type B {NTDS Fast}, Type C {ANEW}, Type D {NTDS Serial}, Type E {NATO Serial}, Type F {Aircraft internal time division multiplex bus}, Type G {RS-449 compatible with RS-232}, Type H {High throughput parallel}, Type J {Fiber optic NATO serial}, Type K {Small Computer System Interface SCSI}}

NUbus {IEEE Std 1196-1987, OBSOLETE, replaced by the PCI bus.}

ONFI {Open NAND Flash Interface. An IC bus for NAND Flash chips}

OP iLink {Sony's name for FireWire; OP i.Link is based on IEEE1394a-2000 using single-core plastic optical fiber.}

PC Bus {ISA/XT/EISA Computer Bus connectors}

PCI Bus {The Peripheral Component Interface 'PCI' [Parallel] Bus was originally developed as a local bus expansion for the PC. The first version of the PCI bus ran at 33MHz with a 32 bit bus (133MBps), the current version runs at 66MHz with a 64 bit bus. The PCI bus operates either synchronously or asynchronously with the "mother Board bus rate: The page contains the Pin-Outs}

PCI-X Bus {The Peripheral Component Interface [PCI-X] addendum is an enhancement to the current 64 bit 66MHz PCI bus specification. The minimum clock speed for PCI-X is 66MHz [PCI-X 66]. Additional bus speeds include: PCI-X 133, PCI-X 266 and PCI-X 533 providing up to 4.3GBps [PCI-X 1066 in the works]. PCI-X is backwards compatible with PCI}

PCI Express Bus {Serial PCI Bus uses two low-voltage differential LVDS pairs, at 2.5Gb/s in each direction. Using 8B/10B encoding, and Supporting 1x, 2x, 4x, 8x, 12x, 16x, 32x bus widths. Replaces the Parallel PCI bus; PCI, and PCI-X. Serial PCI Bus is a point to point serial interface over copper or optical}

PCI-ISA {A passive backplane which moves all active devices off the motherboard and onto a single card. The controller card used in the system has fingers [edge connectors] for both PCI and the ISA bus, the Mother Board only connectors. This allows additional cards to be added to the mother board which use either the ISA or PCI buses. Because only connectors reside on the motherboard, repair time is increased, and down time is decreased. The standard is PICMG-xx. The specification is used in embedded or industrial computer systems, not personal computers.}

PC/104 Bus {PC-104 Embedded Bus: IBM PC XT and AT buses in a different form factor}

PC/104-Plus Bus {PC104-Plus Embedded Bus: IBM PC XT, AT, and PCI bus in a different form factor}

PCI-104 Bus {Removes the IBM XT, and AT buses from the PC/104, and PC/104-Plus boards, but keeps the same PC104 form factor [board size] leaving only the 33MHz PCI bus.}

PCMCIA PC Card {Implementation of the 16 bit ISA Bus on a PCMCIA card: Page provides information, connector pin out and IC/Connector Links}

PCMCIA Cardbus {Implementation the 32 bit PCI bus in a PCMCIA form factor: The page supplies a description, connector pin out, and IC/Connector Links}

PCMCIA Miniature Card {Miniature Card is a smaller implementation of PCMCIA. Miniature Cards dimensions: 3.5mm x 33mm x 38mm (TxLxW). The electrical specifications are a subset of the PC Card standard, restricted to memory applications only. It uses a 16-bit data bus and a 24-bit address bus to allow a single card to store up to 64MB.}

PCMCIA ExpressCard {ExpressCard "Newcard" is the new form factor for PCMCIA Circuit Cards and will utilize either USB and PCI Express buses. The new single width card is 34mm x 75mm. The double width card is 54mm x 74mm (has a 22mm notch). The single card is called ExpressCard/34, and the double width card is called ExpressCard/54. Both cards are 5mm high.}

PISA Bus {PC Expansion Bus [PCI + ISA]: A normal ISA card with an additional row of pins above the ISA pins. The new row of pins are used for the PCI bus. This card is normally only found in OEM industrial or embedded computers}

PXI {PCI eXtensions for Instrumentation [PXI] defines cPCI for Instrumentation adding additional enhancements, with the same form factor as cPCI.}

Q-Bus {A backplane bus used on the now obsolete PDP and MicroVAX computer systems. See DRV11-WA Bus}

QuickPath Bus {Intel uP interface, known internally as the Common System Interface (CSI), is explicitly designed to accommodate integrated memory controllers and distributed shared memory. QuickPath is a point-to-point processor interconnect being developed by Intel for their new generation processors.}

QuickRing Bus {QuickRing, is an offshoot of SCI. QuickRing uses six data signals and a clock speed of 175 MHz to achieve a throughput of 200 MBytes/second/link. The six data signals use the SCI P1596.3 Low Voltage Differential Signaling (LVDS) protocol for low power dissipation and low noise immunity. OBSOLETE, not even sure it reached the market place.}

RapidIO {An LVDS bus suitable for chip-to-chip and board-to-board communications up to 10Gbps [8-bit or 16-bit Input and Output] for High-performance embedded applications such as networking, storage, multimedia, and signal processing. RapidIO is also used as a Backplane interface.}

Reduced Size Multimedia Card {Reduced Size Multimedia Card [RS-MMC] is another flash memory card format type, the smaller version of MMC. The device size is 24 mm x 16 mm x 1.4 mm}

RS-232 Bus {RS232 connector pinout Information. [Copper wire interface]}

RS-422 Bus {EIA422/EIA485 Bus Standard Description. [Copper wire interface]}

RS-423 Bus {EIA423 Bus Standard. [Copper wire interface]}

RS-449 Cable Buses {EIA-530 and 449 Buses Description. [Copper wire interface]}

RS485 Bus {EIA485 Bus Standard Description. [Copper wire interface]}

RS-530 Cable Bus {EIA-530 and 449 Buses Description and Pin outs}

RS-644 Bus {Low Voltage Differential Signaling [LVDS] Wiring Standard; with a description, Information, Interface Circuit, and OEM links. ANSI/TIA/EIA-644 only defines the Electrical layer so there is no pin-out provided by this specification}

S-100 Bus {Obsolete interface bus.}

Sbus {[IEEE-1496] is a computer expansion card bus used with Sun work-stations. Sbus used a 32 bit address and data bus which run at 25MHz for data transfers of 100Mbps. Later increased to two 32 bit word transfers for a through-put of 200Mbps. Sbus is OBSOLETE, replaced by the PCI bus}

SCbus {The SCbus is based on the SCSA specification [Signal Computing System Architecture] as a stand-alone component, with a single distributed switching model. SCbus is a board-to-board 16 or 32 wire, bi-directional, bit-serial, TDM [Time Division Multiplexing] data bus developed for computer telephony. With a serial message bus for control and signaling. The SCbus capacity is 512, 1024 or 2048 [64kbit/s] time-slots depending on the clock frequency used. Any device may occupy any number of time slots [bundling]. The maximum physical bus length is 50cm over a flat cable. Up to 16 SCbus's can be connected together with SCxbus. SCbus is an ANSI standard.}

SCI Bus {Scalable Coherent Interface}; IEEE Std 1596-1992, SCI is a scalable network, nodes are interconnected in a point-to-point unidirectional link [ring]. The bandwidth grows with the number [concurrent] nodes used. SCI links are operate at 1 Gbps [serial], or 1 GBps [16-bit parallel], using a 250-MHz bi-phase clock over fiber optic or twisted-pair wires. Physical SCI controllers use LVDS signaling levels for 16 and 8 bit wide links.}

SCI Bus {Serial Communications Interface is an asynchronous serial communications bus used between uP [CPUs] and peripheral devices [EPROMs for example]. Two signal lines are used with SCI: TXD [Transmit], RXD [Receive]. The two wire bus operates in Full-duplex [transmitting and receiving at the same time]. SCI uses either an 8 or 9 bit data format, with data being sent NRZ [non-return-to-zero] encoding.}

SCSI Bus {Small Computer Systems Interface [SCSI]; SCSI Bus [Parallel Interface] may run up to 12 meters [version dependent]. Page contains connector pin out-Information-Timing-IC/Connector Links}

SDH {Synchronous Digital Hierarchy Links}

Sensor Buses {Is a sub-division of the Industrial Field Buses section used to control sensors and transducers.}

Serial ATA Bus {SATA; The new four-wire Mother Board to Hard-drive serial data bus, set to replace the IDE [Parallel ATA, PATA] bus standard. Serial ATA uses only 4 signal pins, improving pin efficiency over the parallel ATA interface which uses 26 signal pins going between devices [over an 80 conductor ribbon cable onto a 40 pin header connector] . The 4 lines are used for transmitting and receiving differential pairs, plus an additional three grounds pins and a separate power pin. SATA has a maximum bus length of 1 meter with Data running at 150MBps, SATA uses LVDS}

Serial SCSI Bus {Serial Attached SCSI [SAS] uses the SCSI protocol with a Serial ATA physical interface runing at 1.5Gbps or 3.0Gbps. SAS may soon replace parallel SCSI: SAS description, pinouts and links}

Serial Storage Architecture Bus {The 'SSA' spec defines the physical medium, to include [TTL] differential drivers/receivers, clocking, connectors and cables. Runs in full duplex with 20MBps transfer rate in each direction [40MBps]. At that rate the maximum distance is 680 meters. ~ OBSOLETE.. }

SIO (Scalable I/O former NGIO and FIO) by CACR consortium. Runs at 2.5 Gbit serial, or 0.5/2/6 GBps parallel (1/4/12 bits).

SmartCard Bus {ISO 7816; Defines a plastic 'chip card' used to store data via a magnetic strip}

Smartmedia {Another Removable NAND-flash memory card format}

SMbus {System Management Bus is a two wire interface which is based on the I2C bus. The 2 lines are called SMBCLK, and SMBDAT and operate at a frequency of 100KHz. SMbus is used to communicate between ICs, Temperature Sensors, Smart Battery Charges, and 'Smart' batteries. SMLink is an optional SMBus link for external system management ASIC or LAN controllers. Typically, SMBus is powered by the 3.3V power plane, while SMLink is powered by the 3.3V Standby power plane. Systems that implement standby voltages use the isolation to separate devices that can wake up a sleeping system from those that cannot.}

SoC / IP Core Buses {System-On-Chip Bus connects pre-designed modules [IP's] used in FPGAs, PLDs, or ASICs}

SONET {Synchronous Optical NETwork Links}

SPDIF {[Sony/Philips Digital Interface] is used on digital audio consumer products while the AES3 interface is used with professional products}

SPI Buses {Links to the different buses using the term SPI as the bus name}

SPI Bus {Serial Peripheral Interface [SPI-bus] is a 4-wire serial communications [full-duplex] interface used by many microprocessor peripheral chips. The Serial Peripheral Interface (SPI) circuit is a synchronous serial data link [1 megabaud] setup as a Master / Slave interface. The SPI bus specifies two control lines Chip Select [CS] and Serial ClocK [SCLK] and two data lines Serial Data In [SDI] and Serial Data Out [SDO].}

sRIO {Serial Rapid IO}

SSFDC Bus {Solid State Floppy Disk Card}, Removable NAND-type small flash memory card [37mm x 45mm x 0.76mm and lightweight, 2g]. Developed by Toshiba Corp. The old name for Smartmedia}

SSI Bus {The Synchronous Serial Interface [SSI] bus consists of four signals; SCLK, SDATA, SDEN0, and SDEN1. SDATA is a bidirectional [three-state] data line which requires a pull-up or pull-down resistor. Data is sent in 8 bit bytes, LSB first. The SCLK signal is only active during transfers. Data is clocked out on the falling edge and clock in on the rising edge [of the Master]. The other two pins SDEN0 and SDEN1 are enable pins, active high.}

StackableUSB {Standard 2.0 USB interface that is board stackble using USB connectors, but no USB cables.}

STBus {Serial Telcom Bus. The ST-BUS is a high speed, synchronous serial bus for transporting information in a digital format. STBus was developed by Zarlink around 1995}

STD32 {8/16/32 bit TTL bus running at 32MBps. This bus is out-dated but still in operation ~ not recommended for new designs.}

STEbus {8 bit Data bus using TTL logic, with 20 Address lines. The STEbus came in either a 3U or 6U board format.}

SVGA [Super VGA] {offers more colors and resolutions, but really does not exist as a single standard. The primary standard refers to the BIOS, and how the computer talks to the monitor. VESA Display Data Channel [DDC] is a VESA standard that defines how to read certain pins in a standard SVGA monitor to query the monitor's capabilities.}

SwitchedFabric Buses {Definition, Links and Specifications}

T1/E1 Buses {Transmission of 24/32 Digitized analog voice grade channels at 1.544 / 2.048Mbps; Definition and Rates.}

Token Ring Bus {Pinout}

TPMS. Tire Pressure Monitoring System. A vehicle interface to monitor tire pressure.

USB Bus {The Universal Serial Bus provides two-way communication between the PC and peripheral devices, over a Differential 4-wire serial interface cable [Differential data, and Power/Ground] up to 3-5 meters away. A Slow-Speed mode of 1.5Mbps is used for devices such as mice. Full-Speed mode is used by most devices and allows a transfer rate of 12Mbps. High-Speed mode [defined by USB 2.0] allows rates of 480Mbps.}

Utopia Bus {Utopia Bus Standard is the Test & Operations Physical Interface for ATM [Asynchronous Transfer Mode]}

V.35 Bus: {This bus was discontinued, replaced by the V.10/V.11 standard in 1989}

Velocity Interface Mezzanine {VIM} bus provides a dedicated data channel of up to 400 MB/sec to each of four processors on a quad processor 6U VMEbus board. Four 160-pin processor node connectors allow peripherals to deliver data directly to the private resources of each processor. Pentek developed this proprietary bus used on their cards}

VERSAbus {Backplane bus defined by Motorola Corporation in 1979 for its 68000 microprocessor}

VGA [Video Graphics Array]: {VGA [1987] is a superset of EGA, incorporating all EGA modes. Older displays sent digital signals to the monitor, while VGA (and later) send analog signals. This change was necessary to allow for more color precision.}

Video Buses {Video Bus Standards-Info-Links; S-Video, Component/Composite Video, RS170, SCART, DVI}

VLB {VESA [Video Electronic Standards Association] Local bus [VLB or VL-Bus]: An Obsolete PC Local Bus Expansion card developed to operate at 33MHz with a 486 Intel processor.}

V-Link (VIA Technologies, Inc. uses V-Link as a narrow high-speed local interface between its north and south bridge chips that can sustain 266MB/s peak burst bandwidth.)

VLYNQ (Texas Instruments uses the proprietary VLYNQ bus in it's broadband products, such as modems and wireless local area networks (WLANs); voice broadband processors, digital media processors, and OMAP media processor chips.)

VMChannel [VESA Media Channel] { An Obsolete video interface.}

VME Bus {VMEbus P1/P2 connector pin-out}

VME add-on Bus(s) {SkyChannel - RACEWay - Infiniband - P2CI - FPDP - Autobahn}

VXI Bus {VXIbus P1/P2 connector pin-out, some Timing-Information, IC/Connector Links}

Wishbone {An open interface standard used within FPGAs or other programmable ICs to interconnect different blocks together. The interface is implemented in what ever CAE environment the designer is using, VHDL for example. The bus is listed under IP SOC buses above.}

WorldFIP {"Flux Information Processbus" [European Standard EN50170]. WorldFIP is one of a number of so called Field Buses. The Physical Layer: is compliant to IEC 1158-2 for all speeds [up to 2.5Mbit/sec (typically 1Mbit/sec)] on twisted pair and fiber optic. The Physical Layer, Data Link Layer, and Application Layer are specified.}

X.21 is an Out-dated interface. Note that there were a number of standards in the 'X' series.

X-Bus: An Obsolete four wire bus based on RS-485. Two wires for data, and two wires for power.

X-by-Wire Bus A type of vehicle Bus.

XGA [Extended Graphics Array]: IBM introduced the XGA video interface as a successor to its 8514/A display in 1990.

XIO (An interface used on some SGI computers to interface between ASIC processors and memory controllers, in the mid 2000's}

XGMII (10 Gigabit Media Independent Interface. Uses SSTL_2 interface levels. provides an optional interconnection between the Media Access Control (MAC) sublayer and the Physical layer (PHY) of 10 Gigabit Ethernet.}

XLR (Not a bus, but a connector used with audio and video connections, IEC 61076-2-103.}

XSBI (10-Gb Sixteen Bit Interface}

XTX (eXtended Technology ETX) with a form factor of: 95mm x 111.6mm (5.75 x 8 inches). XTX is an Embedded computer board standard, an extension of the ETX board. XTX is a board standard, not a bus standard. XTX removes the ISA interface on the X2 connector [used on ETX] and replaces it with PCIe, SATA, USB .... interfaces

XAUI Ten Attachment Unit Interface.

Zorro II {An IBM PC form factor card and backplane interface used with the Commodore Amiga 2000 computer in the mid 1980s. Using a 16 bit data bus.}

Zorro III {A General Purpose Expansion Bus for High Performance Amiga Computers released in the early 1990's [Commodore computers]. The specification defined both the physical card size and the electrical interfaces to the card. The interfaced seems to based on the Motorola 680x0 processors [68000 processor], using a full 32 bit address bus and 32 bit data bus. Bus speed was independent of the host board. The Zorro III card was backward compatible with a Zorro II card. Side note Commodore went bankrupt in 1994, so interface bus has not been used for a number of years now.}

ZWD {Zero Wire Debug, A non existent bus [in research] that uses coils inside an IC to inductively couple [test signals] to a wireless probe [flex cable with it's own coils] which than communicates with the debugger. So the IC does not need to devote any external pins to a debug bus as they are inductively coupled to the probe via the embedded coil. Proposed nets include; Tx, Rx, and Clk. }

{Electronic Interface Bus Index}

All of the different interface bus pages listed above deal with layer 1 [Physical, Electrical and Mechanical Layer] of the OSI protocol stack.
Many pages also reference layer 2; the Data Link Layer, which provide bit/byte stuffing, checksum, Protocols... Also Protocol descriptions.

Most Bus types are listed on this page. Some links including the Automotive Buses, Avionics Buses, Field Buses, Mezzanine Buses, Switched Fabric, SoC buses, Video Buses, and VME add-on Buses provide a number of different bus types on their pages. All of the links to bus types provide additional device links to connector and IC manufacturers, many pages provide standards and specification links. A brief description is provided after each bus listing, with a more detailed description of the bus provided on it's own bus page.


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Modified 2/26/12
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